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Merge branch 'imx/cpuidle' into late/dt
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This resolves one non-obvious merge conflict between the imx cpuidle
patches and the imx DT changes for 3.9.

Conflicts:
	arch/arm/mach-imx/mach-imx6q.c

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann committed Feb 19, 2013
2 parents 7839c28 + e5f9dec commit 4a9226a
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Showing 29 changed files with 153 additions and 1,967 deletions.
10 changes: 5 additions & 5 deletions arch/arm/Kconfig.debug
Original file line number Diff line number Diff line change
Expand Up @@ -219,12 +219,12 @@ choice
Say Y here if you want kernel low-level debugging support
on i.MX51.

config DEBUG_IMX50_IMX53_UART
bool "i.MX50 and i.MX53 Debug UART"
depends on SOC_IMX50 || SOC_IMX53
config DEBUG_IMX53_UART
bool "i.MX53 Debug UART"
depends on SOC_IMX53
help
Say Y here if you want kernel low-level debugging support
on i.MX50 or i.MX53.
on i.MX53.

config DEBUG_IMX6Q_UART
bool "i.MX6Q Debug UART"
Expand Down Expand Up @@ -497,7 +497,7 @@ config DEBUG_LL_INCLUDE
DEBUG_IMX21_IMX27_UART || \
DEBUG_IMX31_IMX35_UART || \
DEBUG_IMX51_UART || \
DEBUG_IMX50_IMX53_UART ||\
DEBUG_IMX53_UART ||\
DEBUG_IMX6Q_UART
default "debug/highbank.S" if DEBUG_HIGHBANK_UART
default "debug/mvebu.S" if DEBUG_MVEBU_UART
Expand Down
1 change: 0 additions & 1 deletion arch/arm/configs/imx_v6_v7_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,6 @@ CONFIG_MACH_PCM043=y
CONFIG_MACH_MX35_3DS=y
CONFIG_MACH_VPR200=y
CONFIG_MACH_IMX51_DT=y
CONFIG_MACH_MX51_3DS=y
CONFIG_MACH_EUKREA_CPUIMX51SD=y
CONFIG_SOC_IMX53=y
CONFIG_SOC_IMX6Q=y
Expand Down
2 changes: 1 addition & 1 deletion arch/arm/include/debug/imx.S
Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,7 @@
#define UART_PADDR 0x43f90000
#elif defined (CONFIG_DEBUG_IMX51_UART)
#define UART_PADDR 0x73fbc000
#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
#elif defined (CONFIG_DEBUG_IMX53_UART)
#define UART_PADDR 0x53fbc000
#elif defined (CONFIG_DEBUG_IMX6Q_UART)
#define UART_PADDR IMX6Q_DEBUG_UART_BASE
Expand Down
36 changes: 0 additions & 36 deletions arch/arm/mach-imx/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -95,9 +95,6 @@ config MACH_MX27
config ARCH_MX5
bool

config ARCH_MX50
bool

config ARCH_MX51
bool

Expand Down Expand Up @@ -164,11 +161,6 @@ config SOC_IMX5
select CPU_V7
select MXC_TZIC

config SOC_IMX50
bool
select ARCH_MX50
select SOC_IMX5

config SOC_IMX51
bool
select ARCH_MX5
Expand Down Expand Up @@ -738,25 +730,10 @@ endif

if ARCH_MULTI_V7

comment "i.MX5 platforms:"

config MACH_MX50_RDP
bool "Support MX50 reference design platform"
depends on BROKEN
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
select IMX_HAVE_PLATFORM_SPI_IMX
select SOC_IMX50
help
Include support for MX50 reference design platform (RDP) board. This
includes specific configurations for the board and its peripherals.

comment "i.MX51 machines:"

config MACH_IMX51_DT
bool "Support i.MX51 platforms from device tree"
select MACH_MX51_BABBAGE
select SOC_IMX51
help
Include support for Freescale i.MX51 based platforms
Expand All @@ -777,19 +754,6 @@ config MACH_MX51_BABBAGE
u-boot. This includes specific configurations for the board and its
peripherals.

config MACH_MX51_3DS
bool "Support MX51PDK (3DS)"
select IMX_HAVE_PLATFORM_IMX2_WDT
select IMX_HAVE_PLATFORM_IMX_KEYPAD
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
select IMX_HAVE_PLATFORM_SPI_IMX
select MXC_DEBUG_BOARD
select SOC_IMX51
help
Include support for MX51PDK (3DS) platform. This includes specific
configurations for the board and its peripherals.

config MACH_EUKREA_CPUIMX51SD
bool "Support Eukrea CPUIMX51SD module"
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
Expand Down
9 changes: 5 additions & 4 deletions arch/arm/mach-imx/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,11 @@ obj-$(CONFIG_MXC_ULPI) += ulpi.o
obj-$(CONFIG_MXC_USE_EPIT) += epit.o
obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o

ifeq ($(CONFIG_CPU_IDLE),y)
obj-y += cpuidle.o
obj-$(CONFIG_SOC_IMX6Q) += cpuidle-imx6q.o
endif

ifdef CONFIG_SND_IMX_SOC
obj-y += ssi-fiq.o
Expand Down Expand Up @@ -88,7 +92,6 @@ obj-$(CONFIG_MACH_EUKREA_CPUIMX35SD) += mach-cpuimx35.o
obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o
obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o

obj-$(CONFIG_DEBUG_LL) += lluart.o
obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
obj-$(CONFIG_HAVE_IMX_SRC) += src.o
Expand All @@ -103,10 +106,8 @@ endif

# i.MX5 based machines
obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o
obj-$(CONFIG_MACH_MX51_3DS) += mach-mx51_3ds.o
obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o
obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd51-baseboard.o
obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o

obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
Expand Down
4 changes: 0 additions & 4 deletions arch/arm/mach-imx/Makefile.boot
Original file line number Diff line number Diff line change
Expand Up @@ -22,10 +22,6 @@ zreladdr-$(CONFIG_SOC_IMX35) += 0x80008000
params_phys-$(CONFIG_SOC_IMX35) := 0x80000100
initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000

zreladdr-$(CONFIG_SOC_IMX50) += 0x70008000
params_phys-$(CONFIG_SOC_IMX50) := 0x70000100
initrd_phys-$(CONFIG_SOC_IMX50) := 0x70800000

zreladdr-$(CONFIG_SOC_IMX51) += 0x90008000
params_phys-$(CONFIG_SOC_IMX51) := 0x90000100
initrd_phys-$(CONFIG_SOC_IMX51) := 0x90800000
Expand Down
12 changes: 11 additions & 1 deletion arch/arm/mach-imx/clk-imx6q.c
Original file line number Diff line number Diff line change
Expand Up @@ -54,9 +54,18 @@
#define BM_CLPCR_MASK_SCU_IDLE (0x1 << 26)
#define BM_CLPCR_MASK_L2CC_IDLE (0x1 << 27)

#define CGPR 0x64
#define BM_CGPR_CHICKEN_BIT (0x1 << 17)

static void __iomem *ccm_base;

void __init imx6q_clock_map_io(void) { }
void imx6q_set_chicken_bit(void)
{
u32 val = readl_relaxed(ccm_base + CGPR);

val |= BM_CGPR_CHICKEN_BIT;
writel_relaxed(val, ccm_base + CGPR);
}

int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
{
Expand All @@ -68,6 +77,7 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
break;
case WAIT_UNCLOCKED:
val |= 0x1 << BP_CLPCR_LPM;
val |= BM_CLPCR_ARM_CLK_DIS_ON_LPM;
break;
case STOP_POWER_ON:
val |= 0x2 << BP_CLPCR_LPM;
Expand Down
14 changes: 3 additions & 11 deletions arch/arm/mach-imx/common.h
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,6 @@ extern void mx25_map_io(void);
extern void mx27_map_io(void);
extern void mx31_map_io(void);
extern void mx35_map_io(void);
extern void mx50_map_io(void);
extern void mx51_map_io(void);
extern void mx53_map_io(void);
extern void imx1_init_early(void);
Expand All @@ -30,7 +29,6 @@ extern void imx25_init_early(void);
extern void imx27_init_early(void);
extern void imx31_init_early(void);
extern void imx35_init_early(void);
extern void imx50_init_early(void);
extern void imx51_init_early(void);
extern void imx53_init_early(void);
extern void mxc_init_irq(void __iomem *);
Expand All @@ -41,7 +39,6 @@ extern void mx25_init_irq(void);
extern void mx27_init_irq(void);
extern void mx31_init_irq(void);
extern void mx35_init_irq(void);
extern void mx50_init_irq(void);
extern void mx51_init_irq(void);
extern void mx53_init_irq(void);
extern void imx1_soc_init(void);
Expand All @@ -50,7 +47,6 @@ extern void imx25_soc_init(void);
extern void imx27_soc_init(void);
extern void imx31_soc_init(void);
extern void imx35_soc_init(void);
extern void imx50_soc_init(void);
extern void imx51_soc_init(void);
extern void imx51_init_late(void);
extern void imx53_init_late(void);
Expand Down Expand Up @@ -109,27 +105,23 @@ void tzic_handle_irq(struct pt_regs *);
#define imx27_handle_irq avic_handle_irq
#define imx31_handle_irq avic_handle_irq
#define imx35_handle_irq avic_handle_irq
#define imx50_handle_irq tzic_handle_irq
#define imx51_handle_irq tzic_handle_irq
#define imx53_handle_irq tzic_handle_irq
#define imx6q_handle_irq gic_handle_irq

extern void imx_enable_cpu(int cpu, bool enable);
extern void imx_set_cpu_jump(int cpu, void *jump_addr);
#ifdef CONFIG_DEBUG_LL
extern void imx_lluart_map_io(void);
#else
static inline void imx_lluart_map_io(void) {}
#endif
extern void v7_cpu_resume(void);
extern u32 *pl310_get_save_ptr(void);
#ifdef CONFIG_SMP
extern void v7_secondary_startup(void);
extern void imx_scu_map_io(void);
extern void imx_smp_prepare(void);
extern void imx_scu_standby_enable(void);
#else
static inline void imx_scu_map_io(void) {}
static inline void imx_smp_prepare(void) {}
static inline void imx_scu_standby_enable(void) {}
#endif
extern void imx_enable_cpu(int cpu, bool enable);
extern void imx_set_cpu_jump(int cpu, void *jump_addr);
Expand All @@ -139,7 +131,7 @@ extern void imx_gpc_init(void);
extern void imx_gpc_pre_suspend(void);
extern void imx_gpc_post_resume(void);
extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
extern void imx6q_clock_map_io(void);
extern void imx6q_set_chicken_bit(void);

extern void imx_cpu_die(unsigned int cpu);
extern int imx_cpu_kill(unsigned int cpu);
Expand Down
39 changes: 0 additions & 39 deletions arch/arm/mach-imx/cpu-imx5.c
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,6 @@
static int mx5_cpu_rev = -1;

#define IIM_SREV 0x24
#define MX50_HW_ADADIG_DIGPROG 0xB0

static int get_mx51_srev(void)
{
Expand Down Expand Up @@ -108,41 +107,3 @@ int mx53_revision(void)
return mx5_cpu_rev;
}
EXPORT_SYMBOL(mx53_revision);

static int get_mx50_srev(void)
{
void __iomem *anatop = ioremap(MX50_ANATOP_BASE_ADDR, SZ_8K);
u32 rev;

if (!anatop) {
mx5_cpu_rev = -EINVAL;
return 0;
}

rev = readl(anatop + MX50_HW_ADADIG_DIGPROG);
rev &= 0xff;

iounmap(anatop);
if (rev == 0x0)
return IMX_CHIP_REVISION_1_0;
else if (rev == 0x1)
return IMX_CHIP_REVISION_1_1;
return 0;
}

/*
* Returns:
* the silicon revision of the cpu
* -EINVAL - not a mx50
*/
int mx50_revision(void)
{
if (!cpu_is_mx50())
return -EINVAL;

if (mx5_cpu_rev == -1)
mx5_cpu_rev = get_mx50_srev();

return mx5_cpu_rev;
}
EXPORT_SYMBOL(mx50_revision);
95 changes: 95 additions & 0 deletions arch/arm/mach-imx/cpuidle-imx6q.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,95 @@
/*
* Copyright (C) 2012 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/

#include <linux/clockchips.h>
#include <linux/cpuidle.h>
#include <linux/module.h>
#include <asm/cpuidle.h>
#include <asm/proc-fns.h>

#include "common.h"
#include "cpuidle.h"

static atomic_t master = ATOMIC_INIT(0);
static DEFINE_SPINLOCK(master_lock);

static int imx6q_enter_wait(struct cpuidle_device *dev,
struct cpuidle_driver *drv, int index)
{
int cpu = dev->cpu;

clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);

if (atomic_inc_return(&master) == num_online_cpus()) {
/*
* With this lock, we prevent other cpu to exit and enter
* this function again and become the master.
*/
if (!spin_trylock(&master_lock))
goto idle;
imx6q_set_lpm(WAIT_UNCLOCKED);
cpu_do_idle();
imx6q_set_lpm(WAIT_CLOCKED);
spin_unlock(&master_lock);
goto done;
}

idle:
cpu_do_idle();
done:
atomic_dec(&master);
clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);

return index;
}

/*
* For each cpu, setup the broadcast timer because local timer
* stops for the states other than WFI.
*/
static void imx6q_setup_broadcast_timer(void *arg)
{
int cpu = smp_processor_id();

clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &cpu);
}

static struct cpuidle_driver imx6q_cpuidle_driver = {
.name = "imx6q_cpuidle",
.owner = THIS_MODULE,
.en_core_tk_irqen = 1,
.states = {
/* WFI */
ARM_CPUIDLE_WFI_STATE,
/* WAIT */
{
.exit_latency = 50,
.target_residency = 75,
.flags = CPUIDLE_FLAG_TIME_VALID,
.enter = imx6q_enter_wait,
.name = "WAIT",
.desc = "Clock off",
},
},
.state_count = 2,
.safe_state_index = 0,
};

int __init imx6q_cpuidle_init(void)
{
/* Need to enable SCU standby for entering WAIT modes */
imx_scu_standby_enable();

/* Set chicken bit to get a reliable WAIT mode support */
imx6q_set_chicken_bit();

/* Configure the broadcast timer on each cpu */
on_each_cpu(imx6q_setup_broadcast_timer, NULL, 1);

return imx_cpuidle_init(&imx6q_cpuidle_driver);
}
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