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Linus Walleij
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Jan 28, 2013
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refs/heads/master: a352d85adbe8ed0c5c8c69e3ea0ee1833b3ee27e | ||
refs/heads/master: f8635abd38776a413d1e84c79353693b8ecf45c9 |
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trunk/Documentation/devicetree/bindings/arm/ste-nomadik.txt
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ST-Ericsson Nomadik Device Tree Bindings | ||
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For various board the "board" node may contain specific properties | ||
that pertain to this particular board, such as board-specific GPIOs. | ||
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Boards with the Nomadik SoC include: | ||
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S8815 "MiniKit" manufactured by Calao Systems: | ||
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Required root node property: | ||
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compatible="calaosystems,usb-s8815"; | ||
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Required node: usb-s8815 | ||
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Example: | ||
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usb-s8815 { | ||
}; |
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/* | ||
* Device Tree for the ST-Ericsson Nomadik S8815 board | ||
* Produced by Calao Systems | ||
*/ | ||
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/dts-v1/; | ||
/include/ "ste-nomadik-stn8815.dtsi" | ||
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/ { | ||
model = "Calao Systems USB-S8815"; | ||
compatible = "calaosystems,usb-s8815"; | ||
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chosen { | ||
bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk"; | ||
}; | ||
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/* Custom board node with GPIO pins to active etc */ | ||
usb-s8815 { | ||
}; | ||
}; |
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/* | ||
* Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC | ||
*/ | ||
/include/ "skeleton.dtsi" | ||
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/ { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
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memory { | ||
reg = <0x00000000 0x04000000>, | ||
<0x08000000 0x04000000>; | ||
}; | ||
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L2: l2-cache { | ||
compatible = "arm,l210-cache"; | ||
reg = <0x10210000 0x1000>; | ||
interrupt-parent = <&vica>; | ||
interrupts = <30>; | ||
cache-unified; | ||
cache-level = <2>; | ||
}; | ||
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mtu0 { | ||
/* Nomadik system timer */ | ||
reg = <0x101e2000 0x1000>; | ||
interrupt-parent = <&vica>; | ||
interrupts = <4>; | ||
}; | ||
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mtu1 { | ||
/* Secondary timer */ | ||
reg = <0x101e3000 0x1000>; | ||
interrupt-parent = <&vica>; | ||
interrupts = <5>; | ||
}; | ||
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amba { | ||
compatible = "arm,amba-bus"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
ranges; | ||
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vica: intc@0x10140000 { | ||
compatible = "arm,versatile-vic"; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
reg = <0x10140000 0x20>; | ||
}; | ||
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vicb: intc@0x10140020 { | ||
compatible = "arm,versatile-vic"; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
reg = <0x10140020 0x20>; | ||
}; | ||
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uart0: uart@101fd000 { | ||
compatible = "arm,pl011", "arm,primecell"; | ||
reg = <0x101fd000 0x1000>; | ||
interrupt-parent = <&vica>; | ||
interrupts = <12>; | ||
}; | ||
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uart1: uart@101fb000 { | ||
compatible = "arm,pl011", "arm,primecell"; | ||
reg = <0x101fb000 0x1000>; | ||
interrupt-parent = <&vica>; | ||
interrupts = <17>; | ||
}; | ||
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uart2: uart@101f2000 { | ||
compatible = "arm,pl011", "arm,primecell"; | ||
reg = <0x101f2000 0x1000>; | ||
interrupt-parent = <&vica>; | ||
interrupts = <28>; | ||
status = "disabled"; | ||
}; | ||
}; | ||
}; |
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