---

yaml --- r: 166422 b: refs/heads/master c: 07e81d6 h: refs/heads/master v: v3
git-mirror · Sep 18, 2009 · 4c3905e · 4c3905e
1 parent 9d1ad3b
commit 4c3905e
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Showing 3 changed files with 3 additions and 6 deletions.
diff --git a/[refs] b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 4ae59b916d269255800d69a07ac5b0c368a417f8
+refs/heads/master: 07e81d61605f885920f31634a65aace52beb97db
diff --git a/trunk/arch/x86/kernel/traps.c b/trunk/arch/x86/kernel/traps.c
@@ -73,11 +73,9 @@ char ignore_fpu_irq;
 
 /*
  * The IDT has to be page-aligned to simplify the Pentium
- * F0 0F bug workaround.. We have a special link segment
- * for this.
+ * F0 0F bug workaround.
  */
-gate_desc idt_table[NR_VECTORS]
-	__attribute__((__section__(".data.idt"))) = { { { { 0, 0 } } }, };
+gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
 #endif
 
 DECLARE_BITMAP(used_vectors, NR_VECTORS);

diff --git a/trunk/arch/x86/kernel/vmlinux.lds.S b/trunk/arch/x86/kernel/vmlinux.lds.S
@@ -112,7 +112,6 @@ SECTIONS
 #endif
 
 		PAGE_ALIGNED_DATA(PAGE_SIZE)
-		*(.data.idt)
 
 		CACHELINE_ALIGNED_DATA(CONFIG_X86_L1_CACHE_BYTES)
-Original file line number
+Diff line change
@@ Expand Up / @@ -112,7 +112,6 @@ SECTIONS @@
     #endif
     		PAGE_ALIGNED_DATA(PAGE_SIZE)
-    		*(.data.idt)
     		CACHELINE_ALIGNED_DATA(CONFIG_X86_L1_CACHE_BYTES)
@@ Expand Down @@