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ath9k: use ath_hw for DPRINTF() and debug init/exit
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DPRINTF() is used in hw specific related code, as such
ensure we don't rely on the private driver core ath_softc
struct when calling it. Drivers can then implement their
own DPRINTF() as they see fit.

Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Luis R. Rodriguez authored and John W. Linville committed Oct 7, 2009
1 parent d519e17 commit 4d6b228
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Showing 17 changed files with 356 additions and 340 deletions.
2 changes: 1 addition & 1 deletion drivers/net/wireless/ath/ath9k/ahb.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@ static bool ath_ahb_eeprom_read(struct ath_hw *ah, u32 off, u16 *data)

pdata = (struct ath9k_platform_data *) pdev->dev.platform_data;
if (off >= (ARRAY_SIZE(pdata->eeprom_data))) {
DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
DPRINTF(ah, ATH_DBG_FATAL,
"%s: flash read failed, offset %08x is out of range\n",
__func__, off);
return false;
Expand Down
44 changes: 22 additions & 22 deletions drivers/net/wireless/ath/ath9k/ani.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@ static int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah,
}
}

DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI,
"No more channel states left. Using channel 0\n");

return 0;
Expand All @@ -47,7 +47,7 @@ static bool ath9k_hw_ani_control(struct ath_hw *ah,
u32 level = param;

if (level >= ARRAY_SIZE(ah->totalSizeDesired)) {
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI,
"level out of range (%u > %u)\n",
level,
(unsigned)ARRAY_SIZE(ah->totalSizeDesired));
Expand Down Expand Up @@ -152,7 +152,7 @@ static bool ath9k_hw_ani_control(struct ath_hw *ah,
u32 level = param;

if (level >= ARRAY_SIZE(firstep)) {
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI,
"level out of range (%u > %u)\n",
level,
(unsigned) ARRAY_SIZE(firstep));
Expand All @@ -174,7 +174,7 @@ static bool ath9k_hw_ani_control(struct ath_hw *ah,
u32 level = param;

if (level >= ARRAY_SIZE(cycpwrThr1)) {
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI,
"level out of range (%u > %u)\n",
level,
(unsigned)
Expand All @@ -194,23 +194,23 @@ static bool ath9k_hw_ani_control(struct ath_hw *ah,
case ATH9K_ANI_PRESENT:
break;
default:
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI,
"invalid cmd %u\n", cmd);
return false;
}

DPRINTF(ah->ah_sc, ATH_DBG_ANI, "ANI parameters:\n");
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI, "ANI parameters:\n");
DPRINTF(ah, ATH_DBG_ANI,
"noiseImmunityLevel=%d, spurImmunityLevel=%d, "
"ofdmWeakSigDetectOff=%d\n",
aniState->noiseImmunityLevel, aniState->spurImmunityLevel,
!aniState->ofdmWeakSigDetectOff);
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI,
"cckWeakSigThreshold=%d, "
"firstepLevel=%d, listenTime=%d\n",
aniState->cckWeakSigThreshold, aniState->firstepLevel,
aniState->listenTime);
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI,
"cycleCount=%d, ofdmPhyErrCount=%d, cckPhyErrCount=%d\n\n",
aniState->cycleCount, aniState->ofdmPhyErrCount,
aniState->cckPhyErrCount);
Expand Down Expand Up @@ -240,21 +240,21 @@ static void ath9k_ani_restart(struct ath_hw *ah)

if (aniState->ofdmTrigHigh > AR_PHY_COUNTMAX) {
aniState->ofdmPhyErrBase = 0;
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI,
"OFDM Trigger is too high for hw counters\n");
} else {
aniState->ofdmPhyErrBase =
AR_PHY_COUNTMAX - aniState->ofdmTrigHigh;
}
if (aniState->cckTrigHigh > AR_PHY_COUNTMAX) {
aniState->cckPhyErrBase = 0;
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI,
"CCK Trigger is too high for hw counters\n");
} else {
aniState->cckPhyErrBase =
AR_PHY_COUNTMAX - aniState->cckTrigHigh;
}
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI,
"Writing ofdmbase=%u cckbase=%u\n",
aniState->ofdmPhyErrBase,
aniState->cckPhyErrBase);
Expand Down Expand Up @@ -475,7 +475,7 @@ void ath9k_ani_reset(struct ath_hw *ah)

if (DO_ANI(ah) && ah->opmode != NL80211_IFTYPE_STATION
&& ah->opmode != NL80211_IFTYPE_ADHOC) {
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI,
"Reset ANI state opmode %u\n", ah->opmode);
ah->stats.ast_ani_reset++;

Expand Down Expand Up @@ -569,7 +569,7 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah,
if (phyCnt1 < aniState->ofdmPhyErrBase ||
phyCnt2 < aniState->cckPhyErrBase) {
if (phyCnt1 < aniState->ofdmPhyErrBase) {
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI,
"phyCnt1 0x%x, resetting "
"counter value to 0x%x\n",
phyCnt1, aniState->ofdmPhyErrBase);
Expand All @@ -579,7 +579,7 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah,
AR_PHY_ERR_OFDM_TIMING);
}
if (phyCnt2 < aniState->cckPhyErrBase) {
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI,
"phyCnt2 0x%x, resetting "
"counter value to 0x%x\n",
phyCnt2, aniState->cckPhyErrBase);
Expand Down Expand Up @@ -624,7 +624,7 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah,

void ath9k_enable_mib_counters(struct ath_hw *ah)
{
DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Enable MIB counters\n");
DPRINTF(ah, ATH_DBG_ANI, "Enable MIB counters\n");

ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);

Expand All @@ -640,7 +640,7 @@ void ath9k_enable_mib_counters(struct ath_hw *ah)
/* Freeze the MIB counters, get the stats and then clear them */
void ath9k_hw_disable_mib_counters(struct ath_hw *ah)
{
DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Disable MIB counters\n");
DPRINTF(ah, ATH_DBG_ANI, "Disable MIB counters\n");
REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);
ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
REG_WRITE(ah, AR_MIBC, AR_MIBC_CMC);
Expand All @@ -662,7 +662,7 @@ u32 ath9k_hw_GetMibCycleCountsPct(struct ath_hw *ah,
u32 cc = REG_READ(ah, AR_CCCNT);

if (cycles == 0 || cycles > cc) {
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI,
"cycle counter wrap. ExtBusy = 0\n");
good = 0;
} else {
Expand Down Expand Up @@ -764,7 +764,7 @@ void ath9k_hw_ani_init(struct ath_hw *ah)
{
int i;

DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Initialize ANI\n");
DPRINTF(ah, ATH_DBG_ANI, "Initialize ANI\n");

memset(ah->ani, 0, sizeof(ah->ani));
for (i = 0; i < ARRAY_SIZE(ah->ani); i++) {
Expand All @@ -786,10 +786,10 @@ void ath9k_hw_ani_init(struct ath_hw *ah)
AR_PHY_COUNTMAX - ATH9K_ANI_CCK_TRIG_HIGH;
}

DPRINTF(ah->ah_sc, ATH_DBG_ANI,
DPRINTF(ah, ATH_DBG_ANI,
"Setting OfdmErrBase = 0x%08x\n",
ah->ani[0].ofdmPhyErrBase);
DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Setting cckErrBase = 0x%08x\n",
DPRINTF(ah, ATH_DBG_ANI, "Setting cckErrBase = 0x%08x\n",
ah->ani[0].cckPhyErrBase);

REG_WRITE(ah, AR_PHY_ERR_1, ah->ani[0].ofdmPhyErrBase);
Expand All @@ -803,7 +803,7 @@ void ath9k_hw_ani_init(struct ath_hw *ah)

void ath9k_hw_ani_disable(struct ath_hw *ah)
{
DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Disabling ANI\n");
DPRINTF(ah, ATH_DBG_ANI, "Disabling ANI\n");

ath9k_hw_disable_mib_counters(ah);
REG_WRITE(ah, AR_PHY_ERR_1, 0);
Expand Down
32 changes: 16 additions & 16 deletions drivers/net/wireless/ath/ath9k/beacon.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -42,7 +42,7 @@ static int ath_beaconq_config(struct ath_softc *sc)
}

if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) {
DPRINTF(sc, ATH_DBG_FATAL,
DPRINTF(ah, ATH_DBG_FATAL,
"Unable to update h/w beacon queue parameters\n");
return 0;
} else {
Expand Down Expand Up @@ -172,7 +172,7 @@ static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) {
dev_kfree_skb_any(skb);
bf->bf_mpdu = NULL;
DPRINTF(sc, ATH_DBG_FATAL, "dma_mapping_error on beaconing\n");
DPRINTF(sc->sc_ah, ATH_DBG_FATAL, "dma_mapping_error on beaconing\n");
return NULL;
}

Expand All @@ -192,7 +192,7 @@ static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,

if (skb && cabq_depth) {
if (sc->nvifs > 1) {
DPRINTF(sc, ATH_DBG_BEACON,
DPRINTF(sc->sc_ah, ATH_DBG_BEACON,
"Flushing previous cabq traffic\n");
ath_draintxq(sc, cabq, false);
}
Expand Down Expand Up @@ -233,7 +233,7 @@ static void ath_beacon_start_adhoc(struct ath_softc *sc,
/* NB: caller is known to have already stopped tx dma */
ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr);
ath9k_hw_txstart(ah, sc->beacon.beaconq);
DPRINTF(sc, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n",
DPRINTF(ah, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n",
sc->beacon.beaconq, ito64(bf->bf_daddr), bf->bf_desc);
}

Expand Down Expand Up @@ -309,7 +309,7 @@ int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif)
/* NB: the beacon data buffer must be 32-bit aligned. */
skb = ieee80211_beacon_get(sc->hw, vif);
if (skb == NULL) {
DPRINTF(sc, ATH_DBG_BEACON, "cannot get skb\n");
DPRINTF(sc->sc_ah, ATH_DBG_BEACON, "cannot get skb\n");
return -ENOMEM;
}

Expand All @@ -333,7 +333,7 @@ int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif)
tsfadjust = intval * avp->av_bslot / ATH_BCBUF;
avp->tsf_adjust = cpu_to_le64(TU_TO_USEC(tsfadjust));

DPRINTF(sc, ATH_DBG_BEACON,
DPRINTF(sc->sc_ah, ATH_DBG_BEACON,
"stagger beacons, bslot %d intval %u tsfadjust %llu\n",
avp->av_bslot, intval, (unsigned long long)tsfadjust);

Expand All @@ -349,7 +349,7 @@ int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif)
if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) {
dev_kfree_skb_any(skb);
bf->bf_mpdu = NULL;
DPRINTF(sc, ATH_DBG_FATAL,
DPRINTF(sc->sc_ah, ATH_DBG_FATAL,
"dma_mapping_error on beacon alloc\n");
return -ENOMEM;
}
Expand Down Expand Up @@ -405,11 +405,11 @@ void ath_beacon_tasklet(unsigned long data)
sc->beacon.bmisscnt++;

if (sc->beacon.bmisscnt < BSTUCK_THRESH) {
DPRINTF(sc, ATH_DBG_BEACON,
DPRINTF(sc->sc_ah, ATH_DBG_BEACON,
"missed %u consecutive beacons\n",
sc->beacon.bmisscnt);
} else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) {
DPRINTF(sc, ATH_DBG_BEACON,
DPRINTF(sc->sc_ah, ATH_DBG_BEACON,
"beacon is officially stuck\n");
sc->sc_flags |= SC_OP_TSF_RESET;
ath_reset(sc, false);
Expand All @@ -419,7 +419,7 @@ void ath_beacon_tasklet(unsigned long data)
}

if (sc->beacon.bmisscnt != 0) {
DPRINTF(sc, ATH_DBG_BEACON,
DPRINTF(sc->sc_ah, ATH_DBG_BEACON,
"resume beacon xmit after %u misses\n",
sc->beacon.bmisscnt);
sc->beacon.bmisscnt = 0;
Expand Down Expand Up @@ -447,7 +447,7 @@ void ath_beacon_tasklet(unsigned long data)
vif = sc->beacon.bslot[slot];
aphy = sc->beacon.bslot_aphy[slot];

DPRINTF(sc, ATH_DBG_BEACON,
DPRINTF(sc->sc_ah, ATH_DBG_BEACON,
"slot %d [tsf %llu tsftu %u intval %u] vif %p\n",
slot, tsf, tsftu, intval, vif);

Expand Down Expand Up @@ -490,7 +490,7 @@ void ath_beacon_tasklet(unsigned long data)
* are still pending on the queue.
*/
if (!ath9k_hw_stoptxdma(ah, sc->beacon.beaconq)) {
DPRINTF(sc, ATH_DBG_FATAL,
DPRINTF(sc->sc_ah, ATH_DBG_FATAL,
"beacon queue %u did not stop?\n", sc->beacon.beaconq);
}

Expand Down Expand Up @@ -651,8 +651,8 @@ static void ath_beacon_config_sta(struct ath_softc *sc,
/* TSF out of range threshold fixed at 1 second */
bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD;

DPRINTF(sc, ATH_DBG_BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu);
DPRINTF(sc, ATH_DBG_BEACON,
DPRINTF(sc->sc_ah, ATH_DBG_BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu);
DPRINTF(sc->sc_ah, ATH_DBG_BEACON,
"bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n",
bs.bs_bmissthreshold, bs.bs_sleepduration,
bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext);
Expand Down Expand Up @@ -689,7 +689,7 @@ static void ath_beacon_config_adhoc(struct ath_softc *sc,
nexttbtt += intval;
} while (nexttbtt < tsftu);

DPRINTF(sc, ATH_DBG_BEACON,
DPRINTF(sc->sc_ah, ATH_DBG_BEACON,
"IBSS nexttbtt %u intval %u (%u)\n",
nexttbtt, intval, conf->beacon_interval);

Expand Down Expand Up @@ -759,7 +759,7 @@ void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif)
ath_beacon_config_sta(sc, cur_conf);
break;
default:
DPRINTF(sc, ATH_DBG_CONFIG,
DPRINTF(sc->sc_ah, ATH_DBG_CONFIG,
"Unsupported beaconing mode\n");
return;
}
Expand Down
8 changes: 4 additions & 4 deletions drivers/net/wireless/ath/ath9k/btcoex.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -56,7 +56,7 @@ static void ath_detect_bt_priority(struct ath_softc *sc)
if (time_after(jiffies, btinfo->bt_priority_time +
msecs_to_jiffies(ATH_BT_PRIORITY_TIME_THRESHOLD))) {
if (btinfo->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
DPRINTF(sc, ATH_DBG_BTCOEX,
DPRINTF(sc->sc_ah, ATH_DBG_BTCOEX,
"BT priority traffic detected");
sc->sc_flags |= SC_OP_BT_PRIORITY_DETECTED;
} else {
Expand Down Expand Up @@ -90,7 +90,7 @@ static void ath_btcoex_bt_stomp(struct ath_softc *sc,
AR_STOMP_NONE_WLAN_WGHT);
break;
default:
DPRINTF(sc, ATH_DBG_BTCOEX, "Invalid Stomptype\n");
DPRINTF(sc->sc_ah, ATH_DBG_BTCOEX, "Invalid Stomptype\n");
break;
}

Expand Down Expand Up @@ -142,7 +142,7 @@ static void ath_btcoex_no_stomp_timer(void *arg)
struct ath_softc *sc = (struct ath_softc *)arg;
struct ath_btcoex_info *btinfo = &sc->btcoex_info;

DPRINTF(sc, ATH_DBG_BTCOEX, "no stomp timer running \n");
DPRINTF(sc->sc_ah, ATH_DBG_BTCOEX, "no stomp timer running \n");

spin_lock_bh(&btinfo->btcoex_lock);

Expand Down Expand Up @@ -326,7 +326,7 @@ void ath_btcoex_timer_resume(struct ath_softc *sc,
struct ath_btcoex_info *btinfo)
{

DPRINTF(sc, ATH_DBG_BTCOEX, "Starting btcoex timers");
DPRINTF(sc->sc_ah, ATH_DBG_BTCOEX, "Starting btcoex timers");

/* make sure duty cycle timer is also stopped when resuming */
if (btinfo->hw_timer_enabled)
Expand Down
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