[MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
git-mirror · Jul 13, 2006 · 4e8ab36 · 4e8ab36
1 parent f72af3c
commit 4e8ab36
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Showing 2 changed files with 4 additions and 1 deletion.
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
@@ -868,7 +868,9 @@ static void __init probe_pcache(void)
 		if (c->processor_id == 0x0c80U || c->processor_id == 0x0c81U ||
 		    c->processor_id == 0x0c82U) {
 			config &= ~0x00000030U;
-			config |= 0x00410000U;
+			config |= 0x00400000U;
+			if (c->processor_id == 0x0c80U)
+				config |= VR41_CONF_BP;
 			write_c0_config(config);
 		}
 		icache_size = 1 << (10 + ((config & CONF_IC) >> 9));

diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
@@ -470,6 +470,7 @@
 
 /* Bits specific to the VR41xx.  */
 #define VR41_CONF_CS		(_ULCAST_(1) << 12)
+#define VR41_CONF_BP		(_ULCAST_(1) << 16)
 #define VR41_CONF_M16		(_ULCAST_(1) << 20)
 #define VR41_CONF_AD		(_ULCAST_(1) << 23)