Merge tag 'at91-dt-late' of git://github.com/at91linux/linux-at91 int…

…o next/dt

From Nicolas Ferre:
More DT modifications for AT91. Now that I am sure that
the drivers modification are picked-up by MTD.
Changes the use ECC to hardware ECC (named PMECC) for
SoCs that are using it and their associated Evaluation Kits:
- at91sam9x5-ek
- at91sam9n12-ek

* tag 'at91-dt-late' of git://github.com/at91linux/linux-at91:
  ARM: at91: at91sam9n12: add DT parameters to enable PMECC
  ARM: at91: at91sam9x5: add DT parameters to enable PMECC

arch/arm/boot/dts/at91sam9n12.dtsi

@@ -390,8 +390,9 @@
 			reg = < 0x40000000 0x10000000
 				0xffffe000 0x00000600
 				0xffffe600 0x00000200
-				0x00100000 0x00100000
+				0x00108000 0x00018000
 			       >;
+			atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
 			atmel,nand-addr-offset = <21>;
 			atmel,nand-cmd-offset = <22>;
 			pinctrl-names = "default";

arch/arm/boot/dts/at91sam9n12ek.dts

@@ -71,7 +71,10 @@
 
 		nand0: nand@40000000 {
 			nand-bus-width = <8>;
-			nand-ecc-mode = "soft";
+			nand-ecc-mode = "hw";
+			atmel,has-pmecc;
+			atmel,pmecc-cap = <2>;
+			atmel,pmecc-sector-size = <512>;
 			nand-on-flash-bbt;
 			status = "okay";
 		};

arch/arm/boot/dts/at91sam9x5.dtsi

@@ -518,7 +518,11 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			reg = <0x40000000 0x10000000
+			       0xffffe000 0x600		/* PMECC Registers */
+			       0xffffe600 0x200		/* PMECC Error Location Registers */
+			       0x00108000 0x18000	/* PMECC looup table in ROM code  */
 			      >;
+			atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
 			atmel,nand-addr-offset = <21>;
 			atmel,nand-cmd-offset = <22>;
 			pinctrl-names = "default";

arch/arm/boot/dts/at91sam9x5cm.dtsi

@@ -26,7 +26,10 @@
 	ahb {
 		nand0: nand@40000000 {
 			nand-bus-width = <8>;
-			nand-ecc-mode = "soft";
+			nand-ecc-mode = "hw";
+			atmel,has-pmecc;	/* Enable PMECC */
+			atmel,pmecc-cap = <2>;
+			atmel,pmecc-sector-size = <512>;
 			nand-on-flash-bbt;
 			status = "okay";