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ALSA: ASoC: add codec driver for TI TAS5086
This patch adds a driver for TI's TA5086 6-channel PWM processor. This chip has a very unusual register layout, specifically because the registers are of unequal size, and multi-byte registers require bulk writes to take effect. Regmap does not support these kind of mappings. Currently, the driver does not touch any of the registers >= 0x20, so it doesn't matter, because the register map is mapped to an 8-bit array. In case more features will be added in the future that require access to higher registers, the entire regmap H/W I/O routines have to be open-coded. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Daniel Mack
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Mark Brown
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Mar 8, 2013
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Texas Instruments TAS5086 6-channel PWM Processor | ||
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Required properties: | ||
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- compatible: Should contain "ti,tas5086". | ||
- reg: The i2c address. Should contain <0x1b>. | ||
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Optional properties: | ||
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- reset-gpio: A GPIO spec to define which pin is connected to the | ||
chip's !RESET pin. If specified, the driver will | ||
assert a hardware reset at probe time. | ||
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- ti,charge-period: This property should contain the time in microseconds | ||
that closely matches the external single-ended | ||
split-capacitor charge period. The hardware chip | ||
waits for this period of time before starting the | ||
PWM signals. This helps reduce pops and clicks. | ||
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When not specified, the hardware default of 1300ms | ||
is retained. | ||
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Examples: | ||
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i2c_bus { | ||
tas5086@1b { | ||
compatible = "ti,tas5086"; | ||
reg = <0x1b>; | ||
reset-gpio = <&gpio 23 0>; | ||
ti,charge-period = <156000>; | ||
}; | ||
}; |
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#ifndef _SND_SOC_CODEC_TAS5086_H_ | ||
#define _SND_SOC_CODEC_TAS5086_H_ | ||
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#define TAS5086_CLK_IDX_MCLK 0 | ||
#define TAS5086_CLK_IDX_SCLK 1 | ||
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#endif /* _SND_SOC_CODEC_TAS5086_H_ */ |
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