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This is the i386 implementation of kexec. Signed-off-by: Eric Biederman <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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Eric W. Biederman
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Linus Torvalds
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Jun 25, 2005
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/* | ||
* Architecture specific (i386) functions for kexec based crash dumps. | ||
* | ||
* Created by: Hariprasad Nellitheertha (hari@in.ibm.com) | ||
* | ||
* Copyright (C) IBM Corporation, 2004. All rights reserved. | ||
* | ||
*/ | ||
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#include <linux/init.h> | ||
#include <linux/types.h> | ||
#include <linux/kernel.h> | ||
#include <linux/smp.h> | ||
#include <linux/irq.h> | ||
#include <linux/reboot.h> | ||
#include <linux/kexec.h> | ||
#include <linux/irq.h> | ||
#include <linux/delay.h> | ||
#include <linux/elf.h> | ||
#include <linux/elfcore.h> | ||
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#include <asm/processor.h> | ||
#include <asm/hardirq.h> | ||
#include <asm/nmi.h> | ||
#include <asm/hw_irq.h> | ||
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#define MAX_NOTE_BYTES 1024 | ||
typedef u32 note_buf_t[MAX_NOTE_BYTES/4]; | ||
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note_buf_t crash_notes[NR_CPUS]; | ||
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void machine_crash_shutdown(void) | ||
{ | ||
/* This function is only called after the system | ||
* has paniced or is otherwise in a critical state. | ||
* The minimum amount of code to allow a kexec'd kernel | ||
* to run successfully needs to happen here. | ||
* | ||
* In practice this means shooting down the other cpus in | ||
* an SMP system. | ||
*/ | ||
} |
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/* | ||
* machine_kexec.c - handle transition of Linux booting another kernel | ||
* Copyright (C) 2002-2005 Eric Biederman <ebiederm@xmission.com> | ||
* | ||
* This source code is licensed under the GNU General Public License, | ||
* Version 2. See the file COPYING for more details. | ||
*/ | ||
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#include <linux/mm.h> | ||
#include <linux/kexec.h> | ||
#include <linux/delay.h> | ||
#include <asm/pgtable.h> | ||
#include <asm/pgalloc.h> | ||
#include <asm/tlbflush.h> | ||
#include <asm/mmu_context.h> | ||
#include <asm/io.h> | ||
#include <asm/apic.h> | ||
#include <asm/cpufeature.h> | ||
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static inline unsigned long read_cr3(void) | ||
{ | ||
unsigned long cr3; | ||
asm volatile("movl %%cr3,%0": "=r"(cr3)); | ||
return cr3; | ||
} | ||
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#define PAGE_ALIGNED __attribute__ ((__aligned__(PAGE_SIZE))) | ||
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#define L0_ATTR (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY) | ||
#define L1_ATTR (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY) | ||
#define L2_ATTR (_PAGE_PRESENT) | ||
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#define LEVEL0_SIZE (1UL << 12UL) | ||
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#ifndef CONFIG_X86_PAE | ||
#define LEVEL1_SIZE (1UL << 22UL) | ||
static u32 pgtable_level1[1024] PAGE_ALIGNED; | ||
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static void identity_map_page(unsigned long address) | ||
{ | ||
unsigned long level1_index, level2_index; | ||
u32 *pgtable_level2; | ||
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/* Find the current page table */ | ||
pgtable_level2 = __va(read_cr3()); | ||
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/* Find the indexes of the physical address to identity map */ | ||
level1_index = (address % LEVEL1_SIZE)/LEVEL0_SIZE; | ||
level2_index = address / LEVEL1_SIZE; | ||
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/* Identity map the page table entry */ | ||
pgtable_level1[level1_index] = address | L0_ATTR; | ||
pgtable_level2[level2_index] = __pa(pgtable_level1) | L1_ATTR; | ||
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/* Flush the tlb so the new mapping takes effect. | ||
* Global tlb entries are not flushed but that is not an issue. | ||
*/ | ||
load_cr3(pgtable_level2); | ||
} | ||
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#else | ||
#define LEVEL1_SIZE (1UL << 21UL) | ||
#define LEVEL2_SIZE (1UL << 30UL) | ||
static u64 pgtable_level1[512] PAGE_ALIGNED; | ||
static u64 pgtable_level2[512] PAGE_ALIGNED; | ||
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static void identity_map_page(unsigned long address) | ||
{ | ||
unsigned long level1_index, level2_index, level3_index; | ||
u64 *pgtable_level3; | ||
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/* Find the current page table */ | ||
pgtable_level3 = __va(read_cr3()); | ||
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/* Find the indexes of the physical address to identity map */ | ||
level1_index = (address % LEVEL1_SIZE)/LEVEL0_SIZE; | ||
level2_index = (address % LEVEL2_SIZE)/LEVEL1_SIZE; | ||
level3_index = address / LEVEL2_SIZE; | ||
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/* Identity map the page table entry */ | ||
pgtable_level1[level1_index] = address | L0_ATTR; | ||
pgtable_level2[level2_index] = __pa(pgtable_level1) | L1_ATTR; | ||
set_64bit(&pgtable_level3[level3_index], __pa(pgtable_level2) | L2_ATTR); | ||
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/* Flush the tlb so the new mapping takes effect. | ||
* Global tlb entries are not flushed but that is not an issue. | ||
*/ | ||
load_cr3(pgtable_level3); | ||
} | ||
#endif | ||
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static void set_idt(void *newidt, __u16 limit) | ||
{ | ||
unsigned char curidt[6]; | ||
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/* ia32 supports unaliged loads & stores */ | ||
(*(__u16 *)(curidt)) = limit; | ||
(*(__u32 *)(curidt +2)) = (unsigned long)(newidt); | ||
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__asm__ __volatile__ ( | ||
"lidt %0\n" | ||
: "=m" (curidt) | ||
); | ||
}; | ||
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static void set_gdt(void *newgdt, __u16 limit) | ||
{ | ||
unsigned char curgdt[6]; | ||
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/* ia32 supports unaligned loads & stores */ | ||
(*(__u16 *)(curgdt)) = limit; | ||
(*(__u32 *)(curgdt +2)) = (unsigned long)(newgdt); | ||
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__asm__ __volatile__ ( | ||
"lgdt %0\n" | ||
: "=m" (curgdt) | ||
); | ||
}; | ||
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static void load_segments(void) | ||
{ | ||
#define __STR(X) #X | ||
#define STR(X) __STR(X) | ||
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__asm__ __volatile__ ( | ||
"\tljmp $"STR(__KERNEL_CS)",$1f\n" | ||
"\t1:\n" | ||
"\tmovl $"STR(__KERNEL_DS)",%eax\n" | ||
"\tmovl %eax,%ds\n" | ||
"\tmovl %eax,%es\n" | ||
"\tmovl %eax,%fs\n" | ||
"\tmovl %eax,%gs\n" | ||
"\tmovl %eax,%ss\n" | ||
); | ||
#undef STR | ||
#undef __STR | ||
} | ||
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typedef asmlinkage NORET_TYPE void (*relocate_new_kernel_t)( | ||
unsigned long indirection_page, unsigned long reboot_code_buffer, | ||
unsigned long start_address, unsigned int has_pae) ATTRIB_NORET; | ||
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const extern unsigned char relocate_new_kernel[]; | ||
extern void relocate_new_kernel_end(void); | ||
const extern unsigned int relocate_new_kernel_size; | ||
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/* | ||
* A architecture hook called to validate the | ||
* proposed image and prepare the control pages | ||
* as needed. The pages for KEXEC_CONTROL_CODE_SIZE | ||
* have been allocated, but the segments have yet | ||
* been copied into the kernel. | ||
* | ||
* Do what every setup is needed on image and the | ||
* reboot code buffer to allow us to avoid allocations | ||
* later. | ||
* | ||
* Currently nothing. | ||
*/ | ||
int machine_kexec_prepare(struct kimage *image) | ||
{ | ||
return 0; | ||
} | ||
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/* | ||
* Undo anything leftover by machine_kexec_prepare | ||
* when an image is freed. | ||
*/ | ||
void machine_kexec_cleanup(struct kimage *image) | ||
{ | ||
} | ||
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/* | ||
* Do not allocate memory (or fail in any way) in machine_kexec(). | ||
* We are past the point of no return, committed to rebooting now. | ||
*/ | ||
NORET_TYPE void machine_kexec(struct kimage *image) | ||
{ | ||
unsigned long page_list; | ||
unsigned long reboot_code_buffer; | ||
relocate_new_kernel_t rnk; | ||
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/* Interrupts aren't acceptable while we reboot */ | ||
local_irq_disable(); | ||
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/* Compute some offsets */ | ||
reboot_code_buffer = page_to_pfn(image->control_code_page) << PAGE_SHIFT; | ||
page_list = image->head; | ||
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/* Set up an identity mapping for the reboot_code_buffer */ | ||
identity_map_page(reboot_code_buffer); | ||
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/* copy it out */ | ||
memcpy((void *)reboot_code_buffer, relocate_new_kernel, relocate_new_kernel_size); | ||
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/* The segment registers are funny things, they are | ||
* automatically loaded from a table, in memory wherever you | ||
* set them to a specific selector, but this table is never | ||
* accessed again you set the segment to a different selector. | ||
* | ||
* The more common model is are caches where the behide | ||
* the scenes work is done, but is also dropped at arbitrary | ||
* times. | ||
* | ||
* I take advantage of this here by force loading the | ||
* segments, before I zap the gdt with an invalid value. | ||
*/ | ||
load_segments(); | ||
/* The gdt & idt are now invalid. | ||
* If you want to load them you must set up your own idt & gdt. | ||
*/ | ||
set_gdt(phys_to_virt(0),0); | ||
set_idt(phys_to_virt(0),0); | ||
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/* now call it */ | ||
rnk = (relocate_new_kernel_t) reboot_code_buffer; | ||
(*rnk)(page_list, reboot_code_buffer, image->start, cpu_has_pae); | ||
} |
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