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yaml
---
r: 252752
b: refs/heads/master
c: 02c68a0
h: refs/heads/master
v: v3
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Len Brown committed May 29, 2011
1 parent a4c68ac commit 505c20a
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Showing 8 changed files with 27 additions and 27 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 333c5ae9948194428fe6c5ef5c088304fc98263b
refs/heads/master: 02c68a02018669d1817c43c42de800975cbec467
2 changes: 1 addition & 1 deletion trunk/arch/x86/include/asm/acpi.h
Original file line number Diff line number Diff line change
Expand Up @@ -138,7 +138,7 @@ static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
boot_cpu_data.x86_model <= 0x05 &&
boot_cpu_data.x86_mask < 0x0A)
return 1;
else if (c1e_detected)
else if (amd_e400_c1e_detected)
return 1;
else
return max_cstate;
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2 changes: 1 addition & 1 deletion trunk/arch/x86/include/asm/idle.h
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,6 @@ static inline void enter_idle(void) { }
static inline void exit_idle(void) { }
#endif /* CONFIG_X86_64 */

void c1e_remove_cpu(int cpu);
void amd_e400_remove_cpu(int cpu);

#endif /* _ASM_X86_IDLE_H */
4 changes: 2 additions & 2 deletions trunk/arch/x86/include/asm/processor.h
Original file line number Diff line number Diff line change
Expand Up @@ -758,10 +758,10 @@ static inline void __sti_mwait(unsigned long eax, unsigned long ecx)
extern void mwait_idle_with_hints(unsigned long eax, unsigned long ecx);

extern void select_idle_routine(const struct cpuinfo_x86 *c);
extern void init_c1e_mask(void);
extern void init_amd_e400_c1e_mask(void);

extern unsigned long boot_option_idle_override;
extern bool c1e_detected;
extern bool amd_e400_c1e_detected;

enum idle_boot_override {IDLE_NO_OVERRIDE=0, IDLE_HALT, IDLE_NOMWAIT,
IDLE_POLL, IDLE_FORCE_MWAIT};
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2 changes: 1 addition & 1 deletion trunk/arch/x86/kernel/cpu/common.c
Original file line number Diff line number Diff line change
Expand Up @@ -887,7 +887,7 @@ static void vgetcpu_set_mode(void)
void __init identify_boot_cpu(void)
{
identify_cpu(&boot_cpu_data);
init_c1e_mask();
init_amd_e400_c1e_mask();
#ifdef CONFIG_X86_32
sysenter_setup();
enable_sep_cpu();
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38 changes: 19 additions & 19 deletions trunk/arch/x86/kernel/process.c
Original file line number Diff line number Diff line change
Expand Up @@ -538,45 +538,45 @@ int mwait_usable(const struct cpuinfo_x86 *c)
return (edx & MWAIT_EDX_C1);
}

bool c1e_detected;
EXPORT_SYMBOL(c1e_detected);
bool amd_e400_c1e_detected;
EXPORT_SYMBOL(amd_e400_c1e_detected);

static cpumask_var_t c1e_mask;
static cpumask_var_t amd_e400_c1e_mask;

void c1e_remove_cpu(int cpu)
void amd_e400_remove_cpu(int cpu)
{
if (c1e_mask != NULL)
cpumask_clear_cpu(cpu, c1e_mask);
if (amd_e400_c1e_mask != NULL)
cpumask_clear_cpu(cpu, amd_e400_c1e_mask);
}

/*
* C1E aware idle routine. We check for C1E active in the interrupt
* AMD Erratum 400 aware idle routine. We check for C1E active in the interrupt
* pending message MSR. If we detect C1E, then we handle it the same
* way as C3 power states (local apic timer and TSC stop)
*/
static void c1e_idle(void)
static void amd_e400_idle(void)
{
if (need_resched())
return;

if (!c1e_detected) {
if (!amd_e400_c1e_detected) {
u32 lo, hi;

rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);

if (lo & K8_INTP_C1E_ACTIVE_MASK) {
c1e_detected = true;
amd_e400_c1e_detected = true;
if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
mark_tsc_unstable("TSC halt in AMD C1E");
printk(KERN_INFO "System has AMD C1E enabled\n");
}
}

if (c1e_detected) {
if (amd_e400_c1e_detected) {
int cpu = smp_processor_id();

if (!cpumask_test_cpu(cpu, c1e_mask)) {
cpumask_set_cpu(cpu, c1e_mask);
if (!cpumask_test_cpu(cpu, amd_e400_c1e_mask)) {
cpumask_set_cpu(cpu, amd_e400_c1e_mask);
/*
* Force broadcast so ACPI can not interfere.
*/
Expand Down Expand Up @@ -619,17 +619,17 @@ void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
pm_idle = mwait_idle;
} else if (cpu_has_amd_erratum(amd_erratum_400)) {
/* E400: APIC timer interrupt does not wake up CPU from C1e */
printk(KERN_INFO "using C1E aware idle routine\n");
pm_idle = c1e_idle;
printk(KERN_INFO "using AMD E400 aware idle routine\n");
pm_idle = amd_e400_idle;
} else
pm_idle = default_idle;
}

void __init init_c1e_mask(void)
void __init init_amd_e400_c1e_mask(void)
{
/* If we're using c1e_idle, we need to allocate c1e_mask. */
if (pm_idle == c1e_idle)
zalloc_cpumask_var(&c1e_mask, GFP_KERNEL);
/* If we're using amd_e400_idle, we need to allocate amd_e400_c1e_mask. */
if (pm_idle == amd_e400_idle)
zalloc_cpumask_var(&amd_e400_c1e_mask, GFP_KERNEL);
}

static int __init idle_setup(char *str)
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2 changes: 1 addition & 1 deletion trunk/arch/x86/kernel/smpboot.c
Original file line number Diff line number Diff line change
Expand Up @@ -1379,7 +1379,7 @@ void play_dead_common(void)
{
idle_task_exit();
reset_lazy_tlbstate();
c1e_remove_cpu(raw_smp_processor_id());
amd_e400_remove_cpu(raw_smp_processor_id());

mb();
/* Ack it */
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2 changes: 1 addition & 1 deletion trunk/drivers/acpi/processor_idle.c
Original file line number Diff line number Diff line change
Expand Up @@ -161,7 +161,7 @@ static void lapic_timer_check_state(int state, struct acpi_processor *pr,
if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
return;

if (c1e_detected)
if (amd_e400_c1e_detected)
type = ACPI_STATE_C1;

/*
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