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yaml --- r: 101636 b: refs/heads/master c: 46388c0 h: refs/heads/master v: v3
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Remi Machet
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Paul Mackerras
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Jun 9, 2008
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refs/heads/master: c6ec08e03dd06b8dfa3f6d938b0a89c6ed8475c9 | ||
refs/heads/master: 46388c0d88add1c39926cd415039fe931edd5829 |
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/* | ||
* Board setup routines for the GEFanuc C2K board | ||
* | ||
* Author: Remi Machet <rmachet@slac.stanford.edu> | ||
* | ||
* Originated from prpmc2800.c | ||
* | ||
* 2008 (c) Stanford University | ||
* 2007 (c) MontaVista, Software, Inc. | ||
* | ||
* This program is free software; you can redistribute it and/or modify it | ||
* under the terms of the GNU General Public License version 2 as published | ||
* by the Free Software Foundation. | ||
*/ | ||
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#include <linux/stddef.h> | ||
#include <linux/kernel.h> | ||
#include <linux/delay.h> | ||
#include <linux/interrupt.h> | ||
#include <linux/seq_file.h> | ||
#include <linux/time.h> | ||
#include <linux/of.h> | ||
#include <linux/kexec.h> | ||
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#include <asm/machdep.h> | ||
#include <asm/prom.h> | ||
#include <asm/system.h> | ||
#include <asm/time.h> | ||
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#include <mm/mmu_decl.h> | ||
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#include <sysdev/mv64x60.h> | ||
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#define MV64x60_MPP_CNTL_0 0x0000 | ||
#define MV64x60_MPP_CNTL_2 0x0008 | ||
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#define MV64x60_GPP_IO_CNTL 0x0000 | ||
#define MV64x60_GPP_LEVEL_CNTL 0x0010 | ||
#define MV64x60_GPP_VALUE_SET 0x0018 | ||
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static void __iomem *mv64x60_mpp_reg_base; | ||
static void __iomem *mv64x60_gpp_reg_base; | ||
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static void __init c2k_setup_arch(void) | ||
{ | ||
struct device_node *np; | ||
phys_addr_t paddr; | ||
const unsigned int *reg; | ||
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/* | ||
* ioremap mpp and gpp registers in case they are later | ||
* needed by c2k_reset_board(). | ||
*/ | ||
np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-mpp"); | ||
reg = of_get_property(np, "reg", NULL); | ||
paddr = of_translate_address(np, reg); | ||
of_node_put(np); | ||
mv64x60_mpp_reg_base = ioremap(paddr, reg[1]); | ||
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np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-gpp"); | ||
reg = of_get_property(np, "reg", NULL); | ||
paddr = of_translate_address(np, reg); | ||
of_node_put(np); | ||
mv64x60_gpp_reg_base = ioremap(paddr, reg[1]); | ||
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#ifdef CONFIG_PCI | ||
mv64x60_pci_init(); | ||
#endif | ||
} | ||
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static void c2k_reset_board(void) | ||
{ | ||
u32 temp; | ||
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local_irq_disable(); | ||
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temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0); | ||
temp &= 0xFFFF0FFF; | ||
out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0, temp); | ||
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temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL); | ||
temp |= 0x00000004; | ||
out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp); | ||
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temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL); | ||
temp |= 0x00000004; | ||
out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp); | ||
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temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2); | ||
temp &= 0xFFFF0FFF; | ||
out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2, temp); | ||
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temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL); | ||
temp |= 0x00080000; | ||
out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp); | ||
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temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL); | ||
temp |= 0x00080000; | ||
out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp); | ||
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out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_VALUE_SET, 0x00080004); | ||
} | ||
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static void c2k_restart(char *cmd) | ||
{ | ||
c2k_reset_board(); | ||
msleep(100); | ||
panic("restart failed\n"); | ||
} | ||
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#ifdef CONFIG_NOT_COHERENT_CACHE | ||
#define COHERENCY_SETTING "off" | ||
#else | ||
#define COHERENCY_SETTING "on" | ||
#endif | ||
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void c2k_show_cpuinfo(struct seq_file *m) | ||
{ | ||
uint memsize = total_memory; | ||
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seq_printf(m, "Vendor\t\t: GEFanuc\n"); | ||
seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024)); | ||
seq_printf(m, "coherency\t: %s\n", COHERENCY_SETTING); | ||
} | ||
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/* | ||
* Called very early, device-tree isn't unflattened | ||
*/ | ||
static int __init c2k_probe(void) | ||
{ | ||
unsigned long root = of_get_flat_dt_root(); | ||
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if (!of_flat_dt_is_compatible(root, "GEFanuc,C2K")) | ||
return 0; | ||
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printk(KERN_INFO "Detected a GEFanuc C2K board\n"); | ||
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_set_L2CR(0); | ||
_set_L2CR(L2CR_L2E | L2CR_L2PE | L2CR_L2I); | ||
return 1; | ||
} | ||
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define_machine(c2k) { | ||
.name = "C2K", | ||
.probe = c2k_probe, | ||
.setup_arch = c2k_setup_arch, | ||
.init_early = mv64x60_init_early, | ||
.show_cpuinfo = c2k_show_cpuinfo, | ||
.init_IRQ = mv64x60_init_irq, | ||
.get_irq = mv64x60_get_irq, | ||
.restart = c2k_restart, | ||
.calibrate_decr = generic_calibrate_decr, | ||
#ifdef CONFIG_KEXEC | ||
.machine_kexec = default_machine_kexec, | ||
.machine_kexec_prepare = default_machine_kexec_prepare, | ||
.machine_crash_shutdown = default_machine_crash_shutdown, | ||
#endif | ||
}; |