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powerpc/85xx: Rework MPC8548CDS device trees
Utilize new split between board & SoC, and new SoC device trees split into pre & post utilizing 'template' includes for SoC IP blocks. Other changes include: * Moved to a standard 2 #address-cells & #size-cells at top-level * Moved to specifying interrupt-parent for mpic at root * Moved to 4-cell mpic interrupt cells to support MPIC timers * Moved mdio nodes up one level instead of under tsec nodes * Reworked PCIe nodes to allow supportin IRQs for controller (errors) and moved PCI device IRQs down to virtual bridge level * Removed CPU properties setup by u-boot to match other .dts * Added localbus node, but no chipselect details at this point * Added MPIC / PCIe msi node * Dropping "fsl,mpc8548-IP..." from compatibles for standard blocks Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala
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Nov 24, 2011
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,143 @@ | ||
| /* | ||
| * MPC8548 Silicon/SoC Device Tree Source (post include) | ||
| * | ||
| * Copyright 2011 Freescale Semiconductor Inc. | ||
| * | ||
| * Redistribution and use in source and binary forms, with or without | ||
| * modification, are permitted provided that the following conditions are met: | ||
| * * Redistributions of source code must retain the above copyright | ||
| * notice, this list of conditions and the following disclaimer. | ||
| * * Redistributions in binary form must reproduce the above copyright | ||
| * notice, this list of conditions and the following disclaimer in the | ||
| * documentation and/or other materials provided with the distribution. | ||
| * * Neither the name of Freescale Semiconductor nor the | ||
| * names of its contributors may be used to endorse or promote products | ||
| * derived from this software without specific prior written permission. | ||
| * | ||
| * | ||
| * ALTERNATIVELY, this software may be distributed under the terms of the | ||
| * GNU General Public License ("GPL") as published by the Free Software | ||
| * Foundation, either version 2 of that License or (at your option) any | ||
| * later version. | ||
| * | ||
| * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY | ||
| * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | ||
| * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
| * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY | ||
| * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
| * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
| * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
| * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | ||
| * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| */ | ||
|
|
||
| &lbc { | ||
| #address-cells = <2>; | ||
| #size-cells = <1>; | ||
| compatible = "fsl,mpc8548-lbc", "fsl,pq3-localbus", "simple-bus"; | ||
| interrupts = <19 2 0 0>; | ||
| }; | ||
|
|
||
| /* controller at 0x8000 */ | ||
| &pci0 { | ||
| compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; | ||
| device_type = "pci"; | ||
| interrupts = <24 0x2 0 0>; | ||
| bus-range = <0 0xff>; | ||
| #interrupt-cells = <1>; | ||
| #size-cells = <2>; | ||
| #address-cells = <3>; | ||
| }; | ||
|
|
||
| /* controller at 0x9000 */ | ||
| &pci1 { | ||
| compatible = "fsl,mpc8540-pci"; | ||
| device_type = "pci"; | ||
| interrupts = <25 0x2 0 0>; | ||
| bus-range = <0 0xff>; | ||
| #interrupt-cells = <1>; | ||
| #size-cells = <2>; | ||
| #address-cells = <3>; | ||
| }; | ||
|
|
||
| /* controller at 0xa000 */ | ||
| &pci2 { | ||
| compatible = "fsl,mpc8548-pcie"; | ||
| device_type = "pci"; | ||
| #size-cells = <2>; | ||
| #address-cells = <3>; | ||
| bus-range = <0 255>; | ||
| clock-frequency = <33333333>; | ||
| interrupts = <26 2 0 0>; | ||
|
|
||
| pcie@0 { | ||
| reg = <0 0 0 0 0>; | ||
| #interrupt-cells = <1>; | ||
| #size-cells = <2>; | ||
| #address-cells = <3>; | ||
| device_type = "pci"; | ||
| interrupts = <26 2 0 0>; | ||
| interrupt-map-mask = <0xf800 0 0 7>; | ||
| interrupt-map = < | ||
| /* IDSEL 0x0 */ | ||
| 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 | ||
| 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 | ||
| 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 | ||
| 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 | ||
| >; | ||
| }; | ||
| }; | ||
|
|
||
| &soc { | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
| device_type = "soc"; | ||
| compatible = "fsl,mpc8548-immr", "simple-bus"; | ||
| bus-frequency = <0>; // Filled out by uboot. | ||
|
|
||
| ecm-law@0 { | ||
| compatible = "fsl,ecm-law"; | ||
| reg = <0x0 0x1000>; | ||
| fsl,num-laws = <10>; | ||
| }; | ||
|
|
||
| ecm@1000 { | ||
| compatible = "fsl,mpc8548-ecm", "fsl,ecm"; | ||
| reg = <0x1000 0x1000>; | ||
| interrupts = <17 2 0 0>; | ||
| }; | ||
|
|
||
| memory-controller@2000 { | ||
| compatible = "fsl,mpc8548-memory-controller"; | ||
| reg = <0x2000 0x1000>; | ||
| interrupts = <18 2 0 0>; | ||
| }; | ||
|
|
||
| /include/ "pq3-i2c-0.dtsi" | ||
| /include/ "pq3-i2c-1.dtsi" | ||
| /include/ "pq3-duart-0.dtsi" | ||
|
|
||
| L2: l2-cache-controller@20000 { | ||
| compatible = "fsl,mpc8548-l2-cache-controller"; | ||
| reg = <0x20000 0x1000>; | ||
| cache-line-size = <32>; // 32 bytes | ||
| cache-size = <0x80000>; // L2, 512K | ||
| interrupts = <16 2 0 0>; | ||
| }; | ||
|
|
||
| /include/ "pq3-dma-0.dtsi" | ||
| /include/ "pq3-etsec1-0.dtsi" | ||
| /include/ "pq3-etsec1-1.dtsi" | ||
| /include/ "pq3-etsec1-2.dtsi" | ||
| /include/ "pq3-etsec1-3.dtsi" | ||
|
|
||
| /include/ "pq3-sec2.1-0.dtsi" | ||
| /include/ "pq3-mpic.dtsi" | ||
|
|
||
| global-utilities@e0000 { | ||
| compatible = "fsl,mpc8548-guts"; | ||
| reg = <0xe0000 0x1000>; | ||
| fsl,has-rstcr; | ||
| }; | ||
| }; |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,62 @@ | ||
| /* | ||
| * MPC8548 Silicon/SoC Device Tree Source (pre include) | ||
| * | ||
| * Copyright 2011 Freescale Semiconductor Inc. | ||
| * | ||
| * Redistribution and use in source and binary forms, with or without | ||
| * modification, are permitted provided that the following conditions are met: | ||
| * * Redistributions of source code must retain the above copyright | ||
| * notice, this list of conditions and the following disclaimer. | ||
| * * Redistributions in binary form must reproduce the above copyright | ||
| * notice, this list of conditions and the following disclaimer in the | ||
| * documentation and/or other materials provided with the distribution. | ||
| * * Neither the name of Freescale Semiconductor nor the | ||
| * names of its contributors may be used to endorse or promote products | ||
| * derived from this software without specific prior written permission. | ||
| * | ||
| * | ||
| * ALTERNATIVELY, this software may be distributed under the terms of the | ||
| * GNU General Public License ("GPL") as published by the Free Software | ||
| * Foundation, either version 2 of that License or (at your option) any | ||
| * later version. | ||
| * | ||
| * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY | ||
| * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | ||
| * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
| * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY | ||
| * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
| * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
| * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
| * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | ||
| * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| */ | ||
|
|
||
| /dts-v1/; | ||
| / { | ||
| compatible = "fsl,MPC8548"; | ||
| #address-cells = <2>; | ||
| #size-cells = <2>; | ||
| interrupt-parent = <&mpic>; | ||
|
|
||
| aliases { | ||
| serial0 = &serial0; | ||
| serial1 = &serial1; | ||
| ethernet0 = &enet0; | ||
| ethernet1 = &enet2; | ||
| pci0 = &pci0; | ||
| pci1 = &pci1; | ||
| pci2 = &pci2; | ||
| }; | ||
|
|
||
| cpus { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
|
|
||
| PowerPC,8548@0 { | ||
| device_type = "cpu"; | ||
| reg = <0x0>; | ||
| next-level-cache = <&L2>; | ||
| }; | ||
| }; | ||
| }; |
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