---

yaml
---
r: 314078
b: refs/heads/master
c: a9c130d
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 3a8ddb61764a4ee0f6d2eb1fc650f41c4057ecc2
+refs/heads/master: a9c130d522ddef8673728fa9738f4f3f8e61f9b9

trunk/drivers/net/wireless/ti/wl18xx/main.c

@@ -42,6 +42,7 @@
 #define WL18XX_RX_CHECKSUM_MASK      0x40
 
 static char *ht_mode_param;
+static char *board_type_param;
 
 static const u8 wl18xx_rate_to_idx_2ghz[] = {
 	/* MCS rates are used only with 11n */
@@ -680,8 +681,7 @@ static void wl18xx_set_mac_and_phy(struct wl1271 *wl)
 	params.secondary_clock_setting_time =
 		phy->secondary_clock_setting_time;
 
-	/* TODO: hardcoded for now */
-	params.board_type = BOARD_TYPE_DVP_EVB_18XX;
+	params.board_type = priv->board_type;
 
 	wlcore_set_partition(wl, &wl->ptable[PART_PHY_INIT]);
 	wl1271_write(wl, WL18XX_PHY_INIT_MEM_ADDR, (u8 *)&params,
@@ -964,6 +964,7 @@ int __devinit wl18xx_probe(struct platform_device *pdev)
 	}
 
 	wl = hw->priv;
+	priv = wl->priv;
 	wl->ops = &wl18xx_ops;
 	wl->ptable = wl18xx_ptable;
 	wl->rtable = wl18xx_rtable;
@@ -979,6 +980,24 @@ int __devinit wl18xx_probe(struct platform_device *pdev)
 		memcpy(&wl->ht_cap, &wl18xx_mimo_ht_cap,
 		       sizeof(wl18xx_mimo_ht_cap));
 
+	if (!board_type_param) {
+		board_type_param = kstrdup("dvp_evb", GFP_KERNEL);
+		priv->board_type = BOARD_TYPE_DVP_EVB_18XX;
+	} else {
+		if (!strcmp(board_type_param, "fpga"))
+			priv->board_type = BOARD_TYPE_FPGA_18XX;
+		else if (!strcmp(board_type_param, "hdk"))
+			priv->board_type = BOARD_TYPE_HDK_18XX;
+		else if (!strcmp(board_type_param, "dvp_evb"))
+			priv->board_type = BOARD_TYPE_DVP_EVB_18XX;
+		else {
+			wl1271_error("invalid board type '%s'",
+				     board_type_param);
+			wlcore_free_hw(wl);
+			return -EINVAL;
+		}
+	}
+
 	wl18xx_conf_init(wl);
 
 	return wlcore_probe(wl, pdev);
@@ -1015,6 +1034,9 @@ module_exit(wl18xx_exit);
 module_param_named(ht_mode, ht_mode_param, charp, S_IRUSR);
 MODULE_PARM_DESC(ht_mode, "Force HT mode: wide or mimo");
 
+module_param_named(board_type, board_type_param, charp, S_IRUSR);
+MODULE_PARM_DESC(board_type, "Board type: fpga, hdk or dvp_evb (default)");
+
 MODULE_LICENSE("GPL v2");
 MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
 MODULE_FIRMWARE(WL18XX_FW_NAME);

trunk/drivers/net/wireless/ti/wl18xx/wl18xx.h

@@ -34,6 +34,8 @@ struct wl18xx_priv {
 
 	/* Index of last released Tx desc in FW */
 	u8 last_fw_rls_idx;
+
+	u8 board_type;
 };
 
 #define WL18XX_FW_MAX_TX_STATUS_DESC 33