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refs/heads/master: c3146df2b735912eddd1d7c080c9377d5df0ae94 | ||
refs/heads/master: 3d26678e8009b03f27674c2f9e5b236c2f627b14 |
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trunk/Documentation/ABI/testing/configfs-spear-pcie-gadget
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What: /config/pcie-gadget | ||
Date: Feb 2011 | ||
KernelVersion: 2.6.37 | ||
Contact: Pratyush Anand <pratyush.anand@st.com> | ||
Description: | ||
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Interface is used to configure selected dual mode PCIe controller | ||
as device and then program its various registers to configure it | ||
as a particular device type. | ||
This interfaces can be used to show spear's PCIe device capability. | ||
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Nodes are only visible when configfs is mounted. To mount configfs | ||
in /config directory use: | ||
# mount -t configfs none /config/ | ||
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For nth PCIe Device Controller | ||
/config/pcie-gadget.n/ | ||
link ... used to enable ltssm and read its status. | ||
int_type ...used to configure and read type of supported | ||
interrupt | ||
no_of_msi ... used to configure number of MSI vector needed and | ||
to read no of MSI granted. | ||
inta ... write 1 to assert INTA and 0 to de-assert. | ||
send_msi ... write MSI vector to be sent. | ||
vendor_id ... used to write and read vendor id (hex) | ||
device_id ... used to write and read device id (hex) | ||
bar0_size ... used to write and read bar0_size | ||
bar0_address ... used to write and read bar0 mapped area in hex. | ||
bar0_rw_offset ... used to write and read offset of bar0 where | ||
bar0_data will be written or read. | ||
bar0_data ... used to write and read data at bar0_rw_offset. |
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What: /sys/devices/.../mmc_host/mmcX/mmcX:XXXX/enhanced_area_offset | ||
Date: January 2011 | ||
Contact: Chuanxiao Dong <chuanxiao.dong@intel.com> | ||
Description: | ||
Enhanced area is a new feature defined in eMMC4.4 standard. | ||
eMMC4.4 or later card can support such feature. This kind of | ||
area can help to improve the card performance. If the feature | ||
is enabled, this attribute will indicate the start address of | ||
enhanced data area. If not, this attribute will be -EINVAL. | ||
Unit Byte. Format decimal. | ||
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What: /sys/devices/.../mmc_host/mmcX/mmcX:XXXX/enhanced_area_size | ||
Date: January 2011 | ||
Contact: Chuanxiao Dong <chuanxiao.dong@intel.com> | ||
Description: | ||
Enhanced area is a new feature defined in eMMC4.4 standard. | ||
eMMC4.4 or later card can support such feature. This kind of | ||
area can help to improve the card performance. If the feature | ||
is enabled, this attribute will indicate the size of enhanced | ||
data area. If not, this attribute will be -EINVAL. | ||
Unit KByte. Format decimal. |
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ADS1015 (I2C) | ||
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This device is a 12-bit A-D converter with 4 inputs. | ||
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The inputs can be used single ended or in certain differential combinations. | ||
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For configuration all possible combinations are mapped to 8 channels: | ||
0: Voltage over AIN0 and AIN1. | ||
1: Voltage over AIN0 and AIN3. | ||
2: Voltage over AIN1 and AIN3. | ||
3: Voltage over AIN2 and AIN3. | ||
4: Voltage over AIN0 and GND. | ||
5: Voltage over AIN1 and GND. | ||
6: Voltage over AIN2 and GND. | ||
7: Voltage over AIN3 and GND. | ||
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Each channel can be configured individually: | ||
- pga is the programmable gain amplifier (values are full scale) | ||
0: +/- 6.144 V | ||
1: +/- 4.096 V | ||
2: +/- 2.048 V (default) | ||
3: +/- 1.024 V | ||
4: +/- 0.512 V | ||
5: +/- 0.256 V | ||
- data_rate in samples per second | ||
0: 128 | ||
1: 250 | ||
2: 490 | ||
3: 920 | ||
4: 1600 (default) | ||
5: 2400 | ||
6: 3300 | ||
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1) The /ads1015 node | ||
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Required properties: | ||
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- compatible : must be "ti,ads1015" | ||
- reg : I2C bus address of the device | ||
- #address-cells : must be <1> | ||
- #size-cells : must be <0> | ||
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The node contains child nodes for each channel that the platform uses. | ||
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Example ADS1015 node: | ||
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ads1015@49 { | ||
compatible = "ti,ads1015"; | ||
reg = <0x49>; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
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[ child node definitions... ] | ||
} | ||
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2) channel nodes | ||
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Required properties: | ||
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- reg : the channel number | ||
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Optional properties: | ||
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- ti,gain : the programmable gain amplifier setting | ||
- ti,datarate : the converter data rate | ||
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Example ADS1015 channel node: | ||
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channel@4 { | ||
reg = <4>; | ||
ti,gain = <3>; | ||
ti,datarate = <5>; | ||
}; |
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* Open PIC Binding | ||
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This binding specifies what properties must be available in the device tree | ||
representation of an Open PIC compliant interrupt controller. This binding is | ||
based on the binding defined for Open PIC in [1] and is a superset of that | ||
binding. | ||
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Required properties: | ||
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NOTE: Many of these descriptions were paraphrased here from [1] to aid | ||
readability. | ||
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- compatible: Specifies the compatibility list for the PIC. The type | ||
shall be <string> and the value shall include "open-pic". | ||
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- reg: Specifies the base physical address(s) and size(s) of this | ||
PIC's addressable register space. The type shall be <prop-encoded-array>. | ||
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- interrupt-controller: The presence of this property identifies the node | ||
as an Open PIC. No property value shall be defined. | ||
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- #interrupt-cells: Specifies the number of cells needed to encode an | ||
interrupt source. The type shall be a <u32> and the value shall be 2. | ||
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- #address-cells: Specifies the number of cells needed to encode an | ||
address. The type shall be <u32> and the value shall be 0. As such, | ||
'interrupt-map' nodes do not have to specify a parent unit address. | ||
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Optional properties: | ||
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- pic-no-reset: The presence of this property indicates that the PIC | ||
shall not be reset during runtime initialization. No property value shall | ||
be defined. The presence of this property also mandates that any | ||
initialization related to interrupt sources shall be limited to sources | ||
explicitly referenced in the device tree. | ||
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* Interrupt Specifier Definition | ||
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Interrupt specifiers consists of 2 cells encoded as | ||
follows: | ||
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- <1st-cell>: The interrupt-number that identifies the interrupt source. | ||
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- <2nd-cell>: The level-sense information, encoded as follows: | ||
0 = low-to-high edge triggered | ||
1 = active low level-sensitive | ||
2 = active high level-sensitive | ||
3 = high-to-low edge triggered | ||
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* Examples | ||
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Example 1: | ||
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/* | ||
* An Open PIC interrupt controller | ||
*/ | ||
mpic: pic@40000 { | ||
// This is an interrupt controller node. | ||
interrupt-controller; | ||
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// No address cells so that 'interrupt-map' nodes which reference | ||
// this Open PIC node do not need a parent address specifier. | ||
#address-cells = <0>; | ||
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// Two cells to encode interrupt sources. | ||
#interrupt-cells = <2>; | ||
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// Offset address of 0x40000 and size of 0x40000. | ||
reg = <0x40000 0x40000>; | ||
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// Compatible with Open PIC. | ||
compatible = "open-pic"; | ||
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// The PIC shall not be reset. | ||
pic-no-reset; | ||
}; | ||
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Example 2: | ||
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/* | ||
* An interrupt generating device that is wired to an Open PIC. | ||
*/ | ||
serial0: serial@4500 { | ||
// Interrupt source '42' that is active high level-sensitive. | ||
// Note that there are only two cells as specified in the interrupt | ||
// parent's '#interrupt-cells' property. | ||
interrupts = <42 2>; | ||
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// The interrupt controller that this device is wired to. | ||
interrupt-parent = <&mpic>; | ||
}; | ||
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* References | ||
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[1] Power.org (TM) Standard for Embedded Power Architecture (TM) Platform | ||
Requirements (ePAPR), Version 1.0, July 2008. | ||
(http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf) | ||
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