[ARM] 3310/1: add a comment about the possible __kuser_cmpxchg transi…

…ent false

 negative

Patch from Nicolas Pitre

The pre ARMv5 implementation can be aborted if an exception occurs in
the middle of it.  Because of that, the ARMv6 implementation doesn't
re-attempt the operation on a failed strex either.  Let's make this
transient nature of such a false positive more explicit in the
definition.

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

arch/arm/kernel/entry-armv.S

@@ -709,7 +709,12 @@ __kuser_memory_barrier:				@ 0xffff0fa0
  * The C flag is also set if *ptr was changed to allow for assembly
  * optimization in the calling code.
  *
- * Note: this routine already includes memory barriers as needed.
+ * Notes:
+ *
+ *    - This routine already includes memory barriers as needed.
+ *
+ *    - A failure might be transient, i.e. it is possible, although unlikely,
+ *      that "failure" be returned even if *ptr == oldval.
  *
  * For example, a user space atomic_add implementation could look like this:
  *