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drm/nouveau/dmaobj: namespace + nvidia gpu names (no binary change)
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The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs committed Jan 22, 2015
1 parent 878da15 commit 5b85057
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Showing 11 changed files with 157 additions and 176 deletions.
33 changes: 14 additions & 19 deletions drivers/gpu/drm/nouveau/include/nvkm/engine/dmaobj.h
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Original file line number Diff line number Diff line change
@@ -1,31 +1,26 @@
#ifndef __NOUVEAU_DMAOBJ_H__
#define __NOUVEAU_DMAOBJ_H__

#include <core/object.h>
#ifndef __NVKM_DMAOBJ_H__
#define __NVKM_DMAOBJ_H__
#include <core/engine.h>
struct nvkm_gpuobj;

struct nouveau_gpuobj;

struct nouveau_dmaobj {
struct nouveau_object base;
struct nvkm_dmaobj {
struct nvkm_object base;
u32 target;
u32 access;
u64 start;
u64 limit;
};

struct nouveau_dmaeng {
struct nouveau_engine base;
struct nvkm_dmaeng {
struct nvkm_engine base;

/* creates a "physical" dma object from a struct nouveau_dmaobj */
int (*bind)(struct nouveau_dmaobj *dmaobj,
struct nouveau_object *parent,
struct nouveau_gpuobj **);
/* creates a "physical" dma object from a struct nvkm_dmaobj */
int (*bind)(struct nvkm_dmaobj *dmaobj, struct nvkm_object *parent,
struct nvkm_gpuobj **);
};

extern struct nouveau_oclass *nv04_dmaeng_oclass;
extern struct nouveau_oclass *nv50_dmaeng_oclass;
extern struct nouveau_oclass *nvc0_dmaeng_oclass;
extern struct nouveau_oclass *nvd0_dmaeng_oclass;

extern struct nvkm_oclass *nv04_dmaeng_oclass;
extern struct nvkm_oclass *nv50_dmaeng_oclass;
extern struct nvkm_oclass *gf100_dmaeng_oclass;
extern struct nvkm_oclass *gf110_dmaeng_oclass;
#endif
4 changes: 2 additions & 2 deletions drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
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Original file line number Diff line number Diff line change
Expand Up @@ -83,7 +83,7 @@ gm100_identify(struct nouveau_device *device)
#if 0
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
#endif
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass;
Expand Down Expand Up @@ -126,7 +126,7 @@ gm100_identify(struct nouveau_device *device)
#if 0
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
#endif
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
#if 0
device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
Expand Down
18 changes: 9 additions & 9 deletions drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c
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Original file line number Diff line number Diff line change
Expand Up @@ -80,7 +80,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvc0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvc0_gr_oclass;
Expand Down Expand Up @@ -113,7 +113,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvc0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvc4_gr_oclass;
Expand Down Expand Up @@ -146,7 +146,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvc0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvc4_gr_oclass;
Expand Down Expand Up @@ -178,7 +178,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvc0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvc4_gr_oclass;
Expand Down Expand Up @@ -211,7 +211,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvc0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvc4_gr_oclass;
Expand Down Expand Up @@ -243,7 +243,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvc0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvc1_gr_oclass;
Expand Down Expand Up @@ -275,7 +275,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvc0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvc8_gr_oclass;
Expand Down Expand Up @@ -308,7 +308,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvd9_gr_oclass;
Expand Down Expand Up @@ -338,7 +338,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvd7_gr_oclass;
Expand Down
16 changes: 8 additions & 8 deletions drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c
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Original file line number Diff line number Diff line change
Expand Up @@ -80,7 +80,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nve4_gr_oclass;
Expand Down Expand Up @@ -114,7 +114,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nve4_gr_oclass;
Expand Down Expand Up @@ -148,7 +148,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nve4_gr_oclass;
Expand All @@ -174,7 +174,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_BAR ] = &gk20a_bar_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = gk20a_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = gk20a_gr_oclass;
Expand Down Expand Up @@ -204,7 +204,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvf0_gr_oclass;
Expand Down Expand Up @@ -238,7 +238,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = gk110b_gr_oclass;
Expand Down Expand Up @@ -272,7 +272,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nv108_gr_oclass;
Expand Down Expand Up @@ -305,7 +305,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nv108_gr_oclass;
Expand Down
4 changes: 2 additions & 2 deletions drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/Kbuild
View file
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
nvkm-y += nvkm/engine/dmaobj/base.o
nvkm-y += nvkm/engine/dmaobj/nv04.o
nvkm-y += nvkm/engine/dmaobj/nv50.o
nvkm-y += nvkm/engine/dmaobj/nvc0.o
nvkm-y += nvkm/engine/dmaobj/nvd0.o
nvkm-y += nvkm/engine/dmaobj/gf100.o
nvkm-y += nvkm/engine/dmaobj/gf110.o
44 changes: 21 additions & 23 deletions drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/base.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -21,21 +21,19 @@
*
* Authors: Ben Skeggs
*/
#include "priv.h"

#include <core/object.h>
#include <core/client.h>
#include <core/device.h>
#include <nvif/unpack.h>
#include <nvif/class.h>

#include <subdev/fb.h>
#include <subdev/instmem.h>

#include "priv.h"
#include <nvif/class.h>
#include <nvif/unpack.h>

static int
nvkm_dmaobj_bind(struct nouveau_dmaobj *dmaobj, struct nouveau_object *parent,
struct nouveau_gpuobj **pgpuobj)
nvkm_dmaobj_bind(struct nvkm_dmaobj *dmaobj, struct nvkm_object *parent,
struct nvkm_gpuobj **pgpuobj)
{
const struct nvkm_dmaeng_impl *impl = (void *)
nv_oclass(nv_object(dmaobj)->engine);
Expand All @@ -48,32 +46,32 @@ nvkm_dmaobj_bind(struct nouveau_dmaobj *dmaobj, struct nouveau_object *parent,
}
ret = impl->bind(dmaobj, parent, pgpuobj);
if (ret == 0)
nouveau_object_ref(NULL, &parent);
nvkm_object_ref(NULL, &parent);
return ret;
}

return impl->bind(dmaobj, parent, pgpuobj);
}

int
nvkm_dmaobj_create_(struct nouveau_object *parent,
struct nouveau_object *engine,
struct nouveau_oclass *oclass, void **pdata, u32 *psize,
nvkm_dmaobj_create_(struct nvkm_object *parent,
struct nvkm_object *engine,
struct nvkm_oclass *oclass, void **pdata, u32 *psize,
int length, void **pobject)
{
union {
struct nv_dma_v0 v0;
} *args = *pdata;
struct nouveau_instmem *instmem = nouveau_instmem(parent);
struct nouveau_client *client = nouveau_client(parent);
struct nouveau_device *device = nv_device(parent);
struct nouveau_fb *pfb = nouveau_fb(parent);
struct nouveau_dmaobj *dmaobj;
struct nvkm_instmem *instmem = nvkm_instmem(parent);
struct nvkm_client *client = nvkm_client(parent);
struct nvkm_device *device = nv_device(parent);
struct nvkm_fb *pfb = nvkm_fb(parent);
struct nvkm_dmaobj *dmaobj;
void *data = *pdata;
u32 size = *psize;
int ret;

ret = nouveau_object_create_(parent, engine, oclass, 0, length, pobject);
ret = nvkm_object_create_(parent, engine, oclass, 0, length, pobject);
dmaobj = *pobject;
if (ret)
return ret;
Expand Down Expand Up @@ -146,16 +144,16 @@ nvkm_dmaobj_create_(struct nouveau_object *parent,
}

int
_nvkm_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject)
_nvkm_dmaeng_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
const struct nvkm_dmaeng_impl *impl = (void *)oclass;
struct nouveau_dmaeng *dmaeng;
struct nvkm_dmaeng *dmaeng;
int ret;

ret = nouveau_engine_create(parent, engine, oclass, true, "DMAOBJ",
"dmaobj", &dmaeng);
ret = nvkm_engine_create(parent, engine, oclass, true, "DMAOBJ",
"dmaobj", &dmaeng);
*pobject = nv_object(dmaeng);
if (ret)
return ret;
Expand Down
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