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Mika Westerberg
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Rafael J. Wysocki
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Jan 23, 2013
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--- | ||
refs/heads/master: 3d48aab1d5035fac04fe2fbce63eedc345c0e92e | ||
refs/heads/master: 701190fd7419f6757c19cdc6473830c79debb3ae |
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clk-x86-lpss-objs := clk-lpss.o clk-lpt.o | ||
obj-$(CONFIG_X86_INTEL_LPSS) += clk-x86-lpss.o |
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/* | ||
* Intel Low Power Subsystem clocks. | ||
* | ||
* Copyright (C) 2013, Intel Corporation | ||
* Authors: Mika Westerberg <mika.westerberg@linux.intel.com> | ||
* Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
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||
#include <linux/acpi.h> | ||
#include <linux/clk.h> | ||
#include <linux/clk-provider.h> | ||
#include <linux/err.h> | ||
#include <linux/io.h> | ||
#include <linux/module.h> | ||
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static int clk_lpss_is_mmio_resource(struct acpi_resource *res, void *data) | ||
{ | ||
struct resource r; | ||
return !acpi_dev_resource_memory(res, &r); | ||
} | ||
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static acpi_status clk_lpss_find_mmio(acpi_handle handle, u32 level, | ||
void *data, void **retval) | ||
{ | ||
struct resource_list_entry *rentry; | ||
struct list_head resource_list; | ||
struct acpi_device *adev; | ||
const char *uid = data; | ||
int ret; | ||
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if (acpi_bus_get_device(handle, &adev)) | ||
return AE_OK; | ||
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if (uid) { | ||
if (!adev->pnp.unique_id) | ||
return AE_OK; | ||
if (strcmp(uid, adev->pnp.unique_id)) | ||
return AE_OK; | ||
} | ||
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INIT_LIST_HEAD(&resource_list); | ||
ret = acpi_dev_get_resources(adev, &resource_list, | ||
clk_lpss_is_mmio_resource, NULL); | ||
if (ret < 0) | ||
return AE_NO_MEMORY; | ||
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list_for_each_entry(rentry, &resource_list, node) | ||
if (resource_type(&rentry->res) == IORESOURCE_MEM) { | ||
*(struct resource *)retval = rentry->res; | ||
break; | ||
} | ||
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acpi_dev_free_resource_list(&resource_list); | ||
return AE_OK; | ||
} | ||
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/** | ||
* clk_register_lpss_gate - register LPSS clock gate | ||
* @name: name of this clock gate | ||
* @parent_name: parent clock name | ||
* @hid: ACPI _HID of the device | ||
* @uid: ACPI _UID of the device (optional) | ||
* @offset: LPSS PRV_CLOCK_PARAMS offset | ||
* | ||
* Creates and registers LPSS clock gate. | ||
*/ | ||
struct clk *clk_register_lpss_gate(const char *name, const char *parent_name, | ||
const char *hid, const char *uid, | ||
unsigned offset) | ||
{ | ||
struct resource res = { }; | ||
void __iomem *mmio_base; | ||
acpi_status status; | ||
struct clk *clk; | ||
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/* | ||
* First try to look the device and its mmio resource from the | ||
* ACPI namespace. | ||
*/ | ||
status = acpi_get_devices(hid, clk_lpss_find_mmio, (void *)uid, | ||
(void **)&res); | ||
if (ACPI_FAILURE(status) || !res.start) | ||
return ERR_PTR(-ENODEV); | ||
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mmio_base = ioremap(res.start, resource_size(&res)); | ||
if (!mmio_base) | ||
return ERR_PTR(-ENOMEM); | ||
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clk = clk_register_gate(NULL, name, parent_name, 0, mmio_base + offset, | ||
0, 0, NULL); | ||
if (IS_ERR(clk)) | ||
iounmap(mmio_base); | ||
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return clk; | ||
} |
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/* | ||
* Intel Low Power Subsystem clock. | ||
* | ||
* Copyright (C) 2013, Intel Corporation | ||
* Authors: Mika Westerberg <mika.westerberg@linux.intel.com> | ||
* Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
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#ifndef __CLK_LPSS_H | ||
#define __CLK_LPSS_H | ||
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#include <linux/err.h> | ||
#include <linux/errno.h> | ||
#include <linux/clk.h> | ||
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#ifdef CONFIG_ACPI | ||
extern struct clk *clk_register_lpss_gate(const char *name, | ||
const char *parent_name, | ||
const char *hid, const char *uid, | ||
unsigned offset); | ||
#else | ||
static inline struct clk *clk_register_lpss_gate(const char *name, | ||
const char *parent_name, | ||
const char *hid, | ||
const char *uid, | ||
unsigned offset) | ||
{ | ||
return ERR_PTR(-ENODEV); | ||
} | ||
#endif | ||
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#endif /* __CLK_LPSS_H */ |
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/* | ||
* Intel Lynxpoint LPSS clocks. | ||
* | ||
* Copyright (C) 2013, Intel Corporation | ||
* Authors: Mika Westerberg <mika.westerberg@linux.intel.com> | ||
* Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
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#include <linux/acpi.h> | ||
#include <linux/clk.h> | ||
#include <linux/clkdev.h> | ||
#include <linux/clk-provider.h> | ||
#include <linux/err.h> | ||
#include <linux/module.h> | ||
#include <linux/platform_device.h> | ||
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#include "clk-lpss.h" | ||
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#define PRV_CLOCK_PARAMS 0x800 | ||
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static int lpt_clk_probe(struct platform_device *pdev) | ||
{ | ||
struct clk *clk; | ||
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/* LPSS free running clock */ | ||
clk = clk_register_fixed_rate(&pdev->dev, "lpss_clk", NULL, CLK_IS_ROOT, | ||
100000000); | ||
if (IS_ERR(clk)) | ||
return PTR_ERR(clk); | ||
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/* Shared DMA clock */ | ||
clk_register_clkdev(clk, "hclk", "INTL9C60.0.auto"); | ||
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/* SPI clocks */ | ||
clk = clk_register_lpss_gate("spi0_clk", "lpss_clk", "INT33C0", NULL, | ||
PRV_CLOCK_PARAMS); | ||
if (!IS_ERR(clk)) | ||
clk_register_clkdev(clk, NULL, "INT33C0:00"); | ||
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clk = clk_register_lpss_gate("spi1_clk", "lpss_clk", "INT33C1", NULL, | ||
PRV_CLOCK_PARAMS); | ||
if (!IS_ERR(clk)) | ||
clk_register_clkdev(clk, NULL, "INT33C1:00"); | ||
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/* I2C clocks */ | ||
clk = clk_register_lpss_gate("i2c0_clk", "lpss_clk", "INT33C2", NULL, | ||
PRV_CLOCK_PARAMS); | ||
if (!IS_ERR(clk)) | ||
clk_register_clkdev(clk, NULL, "INT33C2:00"); | ||
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clk = clk_register_lpss_gate("i2c1_clk", "lpss_clk", "INT33C3", NULL, | ||
PRV_CLOCK_PARAMS); | ||
if (!IS_ERR(clk)) | ||
clk_register_clkdev(clk, NULL, "INT33C3:00"); | ||
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/* UART clocks */ | ||
clk = clk_register_lpss_gate("uart0_clk", "lpss_clk", "INT33C4", NULL, | ||
PRV_CLOCK_PARAMS); | ||
if (!IS_ERR(clk)) | ||
clk_register_clkdev(clk, NULL, "INT33C4:00"); | ||
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clk = clk_register_lpss_gate("uart1_clk", "lpss_clk", "INT33C5", NULL, | ||
PRV_CLOCK_PARAMS); | ||
if (!IS_ERR(clk)) | ||
clk_register_clkdev(clk, NULL, "INT33C5:00"); | ||
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return 0; | ||
} | ||
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static struct platform_driver lpt_clk_driver = { | ||
.driver = { | ||
.name = "clk-lpt", | ||
.owner = THIS_MODULE, | ||
}, | ||
.probe = lpt_clk_probe, | ||
}; | ||
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static int __init lpt_clk_init(void) | ||
{ | ||
return platform_driver_register(&lpt_clk_driver); | ||
} | ||
arch_initcall(lpt_clk_init); |