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yaml
---
r: 231468
b: refs/heads/master
c: 95d6791
h: refs/heads/master
v: v3
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Yauhen Kharuzhy authored and Kukjin Kim committed Jan 6, 2011
1 parent efbd2eb commit 5da0830
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Showing 92 changed files with 810 additions and 3,188 deletions.
2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: ab10f1dd914ad87e0370bd8b82f77dcd32b6d941
refs/heads/master: 95d6791b4f8aad51caea657236234f21b50a4559
1 change: 0 additions & 1 deletion trunk/arch/arm/Kconfig
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Expand Up @@ -738,7 +738,6 @@ config ARCH_S5PV310
select ARCH_SPARSEMEM_ENABLE
select GENERIC_GPIO
select HAVE_CLK
select ARCH_HAS_CPUFREQ
select GENERIC_CLOCKEVENTS
select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_I2C if I2C
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22 changes: 11 additions & 11 deletions trunk/arch/arm/mach-s3c2410/bast-irq.c
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Expand Up @@ -75,38 +75,38 @@ static unsigned char bast_pc104_irqmasks[] = {
static unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 };

static void
bast_pc104_mask(struct irq_data *data)
bast_pc104_mask(unsigned int irqno)
{
unsigned long temp;

temp = __raw_readb(BAST_VA_PC104_IRQMASK);
temp &= ~bast_pc104_irqmasks[data->irq];
temp &= ~bast_pc104_irqmasks[irqno];
__raw_writeb(temp, BAST_VA_PC104_IRQMASK);
}

static void
bast_pc104_maskack(struct irq_data *data)
bast_pc104_maskack(unsigned int irqno)
{
struct irq_desc *desc = irq_desc + IRQ_ISA;

bast_pc104_mask(data);
desc->irq_data.chip->irq_ack(&desc->irq_data);
bast_pc104_mask(irqno);
desc->chip->ack(IRQ_ISA);
}

static void
bast_pc104_unmask(struct irq_data *data)
bast_pc104_unmask(unsigned int irqno)
{
unsigned long temp;

temp = __raw_readb(BAST_VA_PC104_IRQMASK);
temp |= bast_pc104_irqmasks[data->irq];
temp |= bast_pc104_irqmasks[irqno];
__raw_writeb(temp, BAST_VA_PC104_IRQMASK);
}

static struct irq_chip bast_pc104_chip = {
.irq_mask = bast_pc104_mask,
.irq_unmask = bast_pc104_unmask,
.irq_ack = bast_pc104_maskack
.mask = bast_pc104_mask,
.unmask = bast_pc104_unmask,
.ack = bast_pc104_maskack
};

static void
Expand All @@ -123,7 +123,7 @@ bast_irq_pc104_demux(unsigned int irq,
/* ack if we get an irq with nothing (ie, startup) */

desc = irq_desc + IRQ_ISA;
desc->irq_data.chip->irq_ack(&desc->irq_data);
desc->chip->ack(IRQ_ISA);
} else {
/* handle the IRQ */

Expand Down
4 changes: 2 additions & 2 deletions trunk/arch/arm/mach-s3c2410/include/mach/irqs.h
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Expand Up @@ -152,8 +152,8 @@

#define IRQ_S3C2416_HSMMC0 S3C2410_IRQ(21) /* S3C2416/S3C2450 */

#define IRQ_HSMMC0 IRQ_S3C2443_HSMMC
#define IRQ_HSMMC1 IRQ_S3C2416_HSMMC0
#define IRQ_HSMMC0 IRQ_S3C2416_HSMMC0
#define IRQ_HSMMC1 IRQ_S3C2443_HSMMC

#define IRQ_S3C2443_LCD1 S3C2410_IRQSUB(14)
#define IRQ_S3C2443_LCD2 S3C2410_IRQSUB(15)
Expand Down
4 changes: 2 additions & 2 deletions trunk/arch/arm/mach-s3c2410/include/mach/map.h
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Expand Up @@ -112,8 +112,8 @@
#define S3C_PA_IIC S3C2410_PA_IIC
#define S3C_PA_UART S3C24XX_PA_UART
#define S3C_PA_USBHOST S3C2410_PA_USBHOST
#define S3C_PA_HSMMC0 S3C2443_PA_HSMMC
#define S3C_PA_HSMMC1 S3C2416_PA_HSMMC0
#define S3C_PA_HSMMC0 S3C2416_PA_HSMMC0
#define S3C_PA_HSMMC1 S3C2443_PA_HSMMC
#define S3C_PA_WDT S3C2410_PA_WATCHDOG
#define S3C_PA_NAND S3C24XX_PA_NAND

Expand Down
1 change: 1 addition & 0 deletions trunk/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
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Expand Up @@ -86,6 +86,7 @@
#define S3C2443_HCLKCON_LCDC (1<<9)
#define S3C2443_HCLKCON_USBH (1<<11)
#define S3C2443_HCLKCON_USBD (1<<12)
#define S3C2416_HCLKCON_HSMMC0 (1<<15)
#define S3C2443_HCLKCON_HSMMC (1<<16)
#define S3C2443_HCLKCON_CFC (1<<17)
#define S3C2443_HCLKCON_SSMC (1<<18)
Expand Down
50 changes: 25 additions & 25 deletions trunk/arch/arm/mach-s3c2412/irq.c
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Original file line number Diff line number Diff line change
Expand Up @@ -49,9 +49,9 @@
*/

static void
s3c2412_irq_mask(struct irq_data *data)
s3c2412_irq_mask(unsigned int irqno)
{
unsigned long bitval = 1UL << (data->irq - IRQ_EINT0);
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
unsigned long mask;

mask = __raw_readl(S3C2410_INTMSK);
Expand All @@ -62,19 +62,19 @@ s3c2412_irq_mask(struct irq_data *data)
}

static inline void
s3c2412_irq_ack(struct irq_data *data)
s3c2412_irq_ack(unsigned int irqno)
{
unsigned long bitval = 1UL << (data->irq - IRQ_EINT0);
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);

__raw_writel(bitval, S3C2412_EINTPEND);
__raw_writel(bitval, S3C2410_SRCPND);
__raw_writel(bitval, S3C2410_INTPND);
}

static inline void
s3c2412_irq_maskack(struct irq_data *data)
s3c2412_irq_maskack(unsigned int irqno)
{
unsigned long bitval = 1UL << (data->irq - IRQ_EINT0);
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
unsigned long mask;

mask = __raw_readl(S3C2410_INTMSK);
Expand All @@ -89,9 +89,9 @@ s3c2412_irq_maskack(struct irq_data *data)
}

static void
s3c2412_irq_unmask(struct irq_data *data)
s3c2412_irq_unmask(unsigned int irqno)
{
unsigned long bitval = 1UL << (data->irq - IRQ_EINT0);
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
unsigned long mask;

mask = __raw_readl(S3C2412_EINTMASK);
Expand All @@ -102,11 +102,11 @@ s3c2412_irq_unmask(struct irq_data *data)
}

static struct irq_chip s3c2412_irq_eint0t4 = {
.irq_ack = s3c2412_irq_ack,
.irq_mask = s3c2412_irq_mask,
.irq_unmask = s3c2412_irq_unmask,
.irq_set_wake = s3c_irq_wake,
.irq_set_type = s3c_irqext_type,
.ack = s3c2412_irq_ack,
.mask = s3c2412_irq_mask,
.unmask = s3c2412_irq_unmask,
.set_wake = s3c_irq_wake,
.set_type = s3c_irqext_type,
};

#define INTBIT(x) (1 << ((x) - S3C2410_IRQSUB(0)))
Expand All @@ -132,29 +132,29 @@ static void s3c2412_irq_demux_cfsdi(unsigned int irq, struct irq_desc *desc)
#define INTMSK_CFSDI (1UL << (IRQ_S3C2412_CFSDI - IRQ_EINT0))
#define SUBMSK_CFSDI INTMSK_SUB(IRQ_S3C2412_SDI, IRQ_S3C2412_CF)

static void s3c2412_irq_cfsdi_mask(struct irq_data *data)
static void s3c2412_irq_cfsdi_mask(unsigned int irqno)
{
s3c_irqsub_mask(data->irq, INTMSK_CFSDI, SUBMSK_CFSDI);
s3c_irqsub_mask(irqno, INTMSK_CFSDI, SUBMSK_CFSDI);
}

static void s3c2412_irq_cfsdi_unmask(struct irq_data *data)
static void s3c2412_irq_cfsdi_unmask(unsigned int irqno)
{
s3c_irqsub_unmask(data->irq, INTMSK_CFSDI);
s3c_irqsub_unmask(irqno, INTMSK_CFSDI);
}

static void s3c2412_irq_cfsdi_ack(struct irq_data *data)
static void s3c2412_irq_cfsdi_ack(unsigned int irqno)
{
s3c_irqsub_maskack(data->irq, INTMSK_CFSDI, SUBMSK_CFSDI);
s3c_irqsub_maskack(irqno, INTMSK_CFSDI, SUBMSK_CFSDI);
}

static struct irq_chip s3c2412_irq_cfsdi = {
.name = "s3c2412-cfsdi",
.irq_ack = s3c2412_irq_cfsdi_ack,
.irq_mask = s3c2412_irq_cfsdi_mask,
.irq_unmask = s3c2412_irq_cfsdi_unmask,
.ack = s3c2412_irq_cfsdi_ack,
.mask = s3c2412_irq_cfsdi_mask,
.unmask = s3c2412_irq_cfsdi_unmask,
};

static int s3c2412_irq_rtc_wake(struct irq_data *data, unsigned int state)
static int s3c2412_irq_rtc_wake(unsigned int irqno, unsigned int state)
{
unsigned long pwrcfg;

Expand All @@ -165,7 +165,7 @@ static int s3c2412_irq_rtc_wake(struct irq_data *data, unsigned int state)
pwrcfg |= S3C2412_PWRCFG_RTC_MASKIRQ;
__raw_writel(pwrcfg, S3C2412_PWRCFG);

return s3c_irq_chip.irq_set_wake(data, state);
return s3c_irq_chip.set_wake(irqno, state);
}

static struct irq_chip s3c2412_irq_rtc_chip;
Expand Down Expand Up @@ -193,7 +193,7 @@ static int s3c2412_irq_add(struct sys_device *sysdev)
/* change RTC IRQ's set wake method */

s3c2412_irq_rtc_chip = s3c_irq_chip;
s3c2412_irq_rtc_chip.irq_set_wake = s3c2412_irq_rtc_wake;
s3c2412_irq_rtc_chip.set_wake = s3c2412_irq_rtc_wake;

set_irq_chip(IRQ_RTC, &s3c2412_irq_rtc_chip);

Expand Down
18 changes: 13 additions & 5 deletions trunk/arch/arm/mach-s3c2416/clock.c
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Original file line number Diff line number Diff line change
Expand Up @@ -38,20 +38,19 @@ static unsigned int armdiv[8] = {
[7] = 8,
};

/* ID to hardware numbering, 0 is HSMMC1, 1 is HSMMC0 */
static struct clksrc_clk hsmmc_div[] = {
[0] = {
.clk = {
.name = "hsmmc-div",
.id = 1,
.id = 0,
.parent = &clk_esysclk.clk,
},
.reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 },
},
[1] = {
.clk = {
.name = "hsmmc-div",
.id = 0,
.id = 1,
.parent = &clk_esysclk.clk,
},
.reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
Expand All @@ -61,7 +60,7 @@ static struct clksrc_clk hsmmc_div[] = {
static struct clksrc_clk hsmmc_mux[] = {
[0] = {
.clk = {
.id = 1,
.id = 0,
.name = "hsmmc-if",
.ctrlbit = (1 << 6),
.enable = s3c2443_clkcon_enable_s,
Expand All @@ -77,7 +76,7 @@ static struct clksrc_clk hsmmc_mux[] = {
},
[1] = {
.clk = {
.id = 0,
.id = 1,
.name = "hsmmc-if",
.ctrlbit = (1 << 12),
.enable = s3c2443_clkcon_enable_s,
Expand All @@ -93,6 +92,13 @@ static struct clksrc_clk hsmmc_mux[] = {
},
};

static struct clk hsmmc0_clk = {
.name = "hsmmc",
.id = 0,
.parent = &clk_h,
.enable = s3c2443_clkcon_enable_h,
.ctrlbit = S3C2416_HCLKCON_HSMMC0,
};

static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0)
{
Expand Down Expand Up @@ -130,6 +136,8 @@ void __init s3c2416_init_clocks(int xtal)
for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
s3c_register_clksrc(clksrcs[ptr], 1);

s3c24xx_register_clock(&hsmmc0_clk);

s3c_pwmclk_init();

}
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