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[ARM] sa1100: match clock by dev_name(dev)
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Continuing the move away from implementations which give an excuse
for other bad implementations, convert SA1100 to lookup its singular
clock by dev_name(dev) rather than by id.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored and Russell King committed Nov 27, 2008
1 parent e0d8b13 commit 5e1dbdb
Showing 1 changed file with 27 additions and 73 deletions.
100 changes: 27 additions & 73 deletions arch/arm/mach-sa1100/clock.c
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,7 @@
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
Expand All @@ -14,36 +15,39 @@
#include <mach/hardware.h>

/*
* Very simple clock implementation - we only have one clock to
* deal with at the moment, so we only match using the "name".
* Very simple clock implementation - we only have one clock to deal with.
*/
struct clk {
struct list_head node;
unsigned long rate;
const char *name;
unsigned int enabled;
void (*enable)(void);
void (*disable)(void);
};

static LIST_HEAD(clocks);
static DEFINE_MUTEX(clocks_mutex);
static void clk_gpio27_enable(void)
{
/*
* First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
* (SA-1110 Developer's Manual, section 9.1.2.1)
*/
GAFR |= GPIO_32_768kHz;
GPDR |= GPIO_32_768kHz;
TUCR = TUCR_3_6864MHz;
}

static void clk_gpio27_disable(void)
{
TUCR = 0;
GPDR &= ~GPIO_32_768kHz;
GAFR &= ~GPIO_32_768kHz;
}

static struct clk clk_gpio27;

static DEFINE_SPINLOCK(clocks_lock);

struct clk *clk_get(struct device *dev, const char *id)
{
struct clk *p, *clk = ERR_PTR(-ENOENT);

mutex_lock(&clocks_mutex);
list_for_each_entry(p, &clocks, node) {
if (strcmp(id, p->name) == 0) {
clk = p;
break;
}
}
mutex_unlock(&clocks_mutex);
const char *devname = dev_name(dev);

return clk;
return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
}
EXPORT_SYMBOL(clk_get);

Expand All @@ -58,7 +62,7 @@ int clk_enable(struct clk *clk)

spin_lock_irqsave(&clocks_lock, flags);
if (clk->enabled++ == 0)
clk->enable();
clk_gpio27_enable();
spin_unlock_irqrestore(&clocks_lock, flags);
return 0;
}
Expand All @@ -72,63 +76,13 @@ void clk_disable(struct clk *clk)

spin_lock_irqsave(&clocks_lock, flags);
if (--clk->enabled == 0)
clk->disable();
clk_gpio27_disable();
spin_unlock_irqrestore(&clocks_lock, flags);
}
EXPORT_SYMBOL(clk_disable);

unsigned long clk_get_rate(struct clk *clk)
{
return clk->rate;
return 3686400;
}
EXPORT_SYMBOL(clk_get_rate);


static void clk_gpio27_enable(void)
{
/*
* First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
* (SA-1110 Developer's Manual, section 9.1.2.1)
*/
GAFR |= GPIO_32_768kHz;
GPDR |= GPIO_32_768kHz;
TUCR = TUCR_3_6864MHz;
}

static void clk_gpio27_disable(void)
{
TUCR = 0;
GPDR &= ~GPIO_32_768kHz;
GAFR &= ~GPIO_32_768kHz;
}

static struct clk clk_gpio27 = {
.name = "SA1111_CLK",
.rate = 3686400,
.enable = clk_gpio27_enable,
.disable = clk_gpio27_disable,
};

int clk_register(struct clk *clk)
{
mutex_lock(&clocks_mutex);
list_add(&clk->node, &clocks);
mutex_unlock(&clocks_mutex);
return 0;
}
EXPORT_SYMBOL(clk_register);

void clk_unregister(struct clk *clk)
{
mutex_lock(&clocks_mutex);
list_del(&clk->node);
mutex_unlock(&clocks_mutex);
}
EXPORT_SYMBOL(clk_unregister);

static int __init clk_init(void)
{
clk_register(&clk_gpio27);
return 0;
}
arch_initcall(clk_init);

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