Skip to content

Commit

Permalink
---
Browse files Browse the repository at this point in the history 
yaml
---
r: 231811
b: refs/heads/master
c: 5701542
h: refs/heads/master
i:
  231809: 0f2cba6
  231807: 7b237b1
v: v3
  • Loading branch information
Greg Ungerer committed Jan 5, 2011
1 parent c928a19 commit 5e33fc6
Show file tree
Hide file tree
Showing 13 changed files with 75 additions and 46 deletions.
2 changes: 1 addition & 1 deletion [refs]
View file
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 733f31b764061d976a60c5ee454632d9562900ea
refs/heads/master: 57015421d3f3deafb1f6ccf03a6fe0539763dbee
10 changes: 9 additions & 1 deletion trunk/arch/m68k/include/asm/m5206sim.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -90,14 +90,22 @@
#define MCFSIM_PADDR (MCF_MBAR + 0x1c5) /* Parallel Direction (r/w) */
#define MCFSIM_PADAT (MCF_MBAR + 0x1c9) /* Parallel Port Value (r/w) */

#if defined(CONFIG_NETtel)
#define MCFUART_BASE1 0x180 /* Base address of UART1 */
#define MCFUART_BASE2 0x140 /* Base address of UART2 */
#else
#define MCFUART_BASE1 0x140 /* Base address of UART1 */
#define MCFUART_BASE2 0x180 /* Base address of UART2 */
#endif

/*
* Define system peripheral IRQ usage.
*/
#define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */
#define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */

/*
* Generic GPIO
* Generic GPIO
*/
#define MCFGPIO_PIN_MAX 8
#define MCFGPIO_IRQ_VECBASE -1
Expand Down
9 changes: 8 additions & 1 deletion trunk/arch/m68k/include/asm/m520xsim.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -100,6 +100,7 @@
#define MCFGPIO_PCLRR_UART 0xFC0A402A
#define MCFGPIO_PCLRR_FECH 0xFC0A402B
#define MCFGPIO_PCLRR_FECL 0xFC0A402C

/*
* Generic GPIO support
*/
Expand All @@ -112,7 +113,6 @@
#define MCFGPIO_PIN_MAX 80
#define MCFGPIO_IRQ_MAX 8
#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE
/****************************************************************************/

#define MCF_GPIO_PAR_UART (0xA4036)
#define MCF_GPIO_PAR_FECI2C (0xA4033)
Expand All @@ -128,6 +128,13 @@
#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2 (0x02)
#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04)

/*
* UART module.
*/
#define MCFUART_BASE1 0x60000 /* Base address of UART1 */
#define MCFUART_BASE2 0x64000 /* Base address of UART2 */
#define MCFUART_BASE3 0x68000 /* Base address of UART2 */

/*
* Reset Controll Unit.
*/
Expand Down
7 changes: 7 additions & 0 deletions trunk/arch/m68k/include/asm/m523xsim.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -52,6 +52,13 @@
#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */

/*
* UART module.
*/
#define MCFUART_BASE1 0x200 /* Base address of UART1 */
#define MCFUART_BASE2 0x240 /* Base address of UART2 */
#define MCFUART_BASE3 0x280 /* Base address of UART3 */

#define MCFGPIO_PODR_ADDR (MCF_IPSBAR + 0x100000)
#define MCFGPIO_PODR_DATAH (MCF_IPSBAR + 0x100001)
#define MCFGPIO_PODR_DATAL (MCF_IPSBAR + 0x100002)
Expand Down
5 changes: 5 additions & 0 deletions trunk/arch/m68k/include/asm/m5249sim.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -59,6 +59,11 @@
#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */
#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */

/*
* UART module.
*/
#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
#define MCFUART_BASE2 0x200 /* Base address of UART2 */

/*
* Some symbol defines for the above...
Expand Down
3 changes: 3 additions & 0 deletions trunk/arch/m68k/include/asm/m5272sim.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -65,6 +65,9 @@
#define MCFSIM_DCMR1 0x5c /* DRAM 1 Mask reg (r/w) */
#define MCFSIM_DCCR1 0x63 /* DRAM 1 Control reg (r/w) */

#define MCFUART_BASE1 0x100 /* Base address of UART1 */
#define MCFUART_BASE2 0x140 /* Base address of UART2 */

#define MCFSIM_PACNT (MCF_MBAR + 0x80) /* Port A Control (r/w) */
#define MCFSIM_PADDR (MCF_MBAR + 0x84) /* Port A Direction (r/w) */
#define MCFSIM_PADAT (MCF_MBAR + 0x86) /* Port A Data (r/w) */
Expand Down
6 changes: 6 additions & 0 deletions trunk/arch/m68k/include/asm/m527xsim.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -58,6 +58,12 @@
#define MCFSIM_DMR1 0x5c /* SDRAM address mask 1 */
#endif

/*
* UART module.
*/
#define MCFUART_BASE1 0x200 /* Base address of UART1 */
#define MCFUART_BASE2 0x240 /* Base address of UART2 */
#define MCFUART_BASE3 0x280 /* Base address of UART3 */

#ifdef CONFIG_M5271
#define MCFGPIO_PODR_ADDR (MCF_IPSBAR + 0x100000)
Expand Down
7 changes: 7 additions & 0 deletions trunk/arch/m68k/include/asm/m528xsim.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,13 @@
#define MCFSIM_DACR1 0x50 /* SDRAM base address 1 */
#define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */

/*
* UART module.
*/
#define MCFUART_BASE1 0x200 /* Base address of UART1 */
#define MCFUART_BASE2 0x240 /* Base address of UART2 */
#define MCFUART_BASE3 0x280 /* Base address of UART3 */

/*
* GPIO registers
*/
Expand Down
11 changes: 11 additions & 0 deletions trunk/arch/m68k/include/asm/m5307sim.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -96,6 +96,17 @@
#define MCFSIM_PADDR (MCF_MBAR + 0x244)
#define MCFSIM_PADAT (MCF_MBAR + 0x248)

/*
* UART module.
*/
#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
#define MCFUART_BASE1 0x200 /* Base address of UART1 */
#define MCFUART_BASE2 0x1c0 /* Base address of UART2 */
#else
#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
#define MCFUART_BASE2 0x200 /* Base address of UART2 */
#endif

/*
* Generic GPIO support
*/
Expand Down
7 changes: 7 additions & 0 deletions trunk/arch/m68k/include/asm/m532xsim.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -103,6 +103,13 @@
#define ACR_CM_OFF_IMP (3<<5)
#define ACR_WPROTECT (1<<2)

/*
* UART module.
*/
#define MCFUART_BASE1 0xFC060000 /* Base address of UART1 */
#define MCFUART_BASE2 0xFC064000 /* Base address of UART2 */
#define MCFUART_BASE3 0xFC068000 /* Base address of UART3 */

/*********************************************************************
*
* Reset Controller Module
Expand Down
3 changes: 3 additions & 0 deletions trunk/arch/m68k/include/asm/m5407sim.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,9 @@
#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */
#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */

#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
#define MCFUART_BASE2 0x200 /* Base address of UART2 */

#define MCFSIM_PADDR (MCF_MBAR + 0x244)
#define MCFSIM_PADAT (MCF_MBAR + 0x248)

Expand Down
8 changes: 8 additions & 0 deletions trunk/arch/m68k/include/asm/m54xxsim.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -24,6 +24,14 @@
#define MCFINTC_IACKL 0x19 /* */
#define MCFINTC_ICR0 0x40 /* Base ICR register */

/*
* UART module.
*/
#define MCFUART_BASE1 0x8600 /* Base address of UART1 */
#define MCFUART_BASE2 0x8700 /* Base address of UART2 */
#define MCFUART_BASE3 0x8800 /* Base address of UART3 */
#define MCFUART_BASE4 0x8900 /* Base address of UART4 */

/*
* Define system peripheral IRQ usage.
*/
Expand Down
43 changes: 0 additions & 43 deletions trunk/arch/m68k/include/asm/mcfuart.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,49 +12,6 @@
#define mcfuart_h
/****************************************************************************/

/*
* Define the base address of the UARTS within the MBAR address
* space.
*/
#if defined(CONFIG_M5272)
#define MCFUART_BASE1 0x100 /* Base address of UART1 */
#define MCFUART_BASE2 0x140 /* Base address of UART2 */
#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e)
#if defined(CONFIG_NETtel)
#define MCFUART_BASE1 0x180 /* Base address of UART1 */
#define MCFUART_BASE2 0x140 /* Base address of UART2 */
#else
#define MCFUART_BASE1 0x140 /* Base address of UART1 */
#define MCFUART_BASE2 0x180 /* Base address of UART2 */
#endif
#elif defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
#define MCFUART_BASE1 0x200 /* Base address of UART1 */
#define MCFUART_BASE2 0x240 /* Base address of UART2 */
#define MCFUART_BASE3 0x280 /* Base address of UART3 */
#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
#define MCFUART_BASE1 0x200 /* Base address of UART1 */
#define MCFUART_BASE2 0x1c0 /* Base address of UART2 */
#else
#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
#define MCFUART_BASE2 0x200 /* Base address of UART2 */
#endif
#elif defined(CONFIG_M520x)
#define MCFUART_BASE1 0x60000 /* Base address of UART1 */
#define MCFUART_BASE2 0x64000 /* Base address of UART2 */
#define MCFUART_BASE3 0x68000 /* Base address of UART2 */
#elif defined(CONFIG_M532x)
#define MCFUART_BASE1 0xfc060000 /* Base address of UART1 */
#define MCFUART_BASE2 0xfc064000 /* Base address of UART2 */
#define MCFUART_BASE3 0xfc068000 /* Base address of UART3 */
#elif defined(CONFIG_M54xx)
#define MCFUART_BASE1 0x8600 /* on M54xx */
#define MCFUART_BASE2 0x8700 /* on M54xx */
#define MCFUART_BASE3 0x8800 /* on M54xx */
#define MCFUART_BASE4 0x8900 /* on M54xx */
#endif


#include <linux/serial_core.h>
#include <linux/platform_device.h>

Expand Down

0 comments on commit 5e33fc6

Please sign in to comment.