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Merge tag 'asoc-v3.14-rc6' of git://git.kernel.org/pub/scm/linux/kern…
…el/git/broonie/sound into for-linus ASoC: Fixes for v3.14 A few things here: - Avoid memory leaks in error cases with DPCM, this code has never been that well tested in mainline due to the lack of mainline drivers but we now have one queued for the merge window! - Fix the N810 audio driver to load when booted with DT since the platform was converted to DT during the merge window. - Fixes for initialisation of some MFD drivers that are probably unused in mainline
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Original file line number | Diff line number | Diff line change |
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* OpenCores MAC 10/100 Mbps | ||
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Required properties: | ||
- compatible: Should be "opencores,ethoc". | ||
- reg: two memory regions (address and length), | ||
first region is for the device registers and descriptor rings, | ||
second is for the device packet memory. | ||
- interrupts: interrupt for the device. | ||
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Optional properties: | ||
- clocks: phandle to refer to the clk used as per | ||
Documentation/devicetree/bindings/clock/clock-bindings.txt | ||
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Examples: | ||
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enet0: ethoc@fd030000 { | ||
compatible = "opencores,ethoc"; | ||
reg = <0xfd030000 0x4000 0xfd800000 0x4000>; | ||
interrupts = <1>; | ||
local-mac-address = [00 50 c2 13 6f 00]; | ||
clocks = <&osc>; | ||
}; |
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STMicroelectronics SoC DWMAC glue layer controller | ||
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The device node has following properties. | ||
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Required properties: | ||
- compatible : Can be "st,stih415-dwmac", "st,stih416-dwmac" or | ||
"st,stid127-dwmac". | ||
- reg : Offset of the glue configuration register map in system | ||
configuration regmap pointed by st,syscon property and size. | ||
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- reg-names : Should be "sti-ethconf". | ||
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- st,syscon : Should be phandle to system configuration node which | ||
encompases this glue registers. | ||
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- st,tx-retime-src: On STi Parts for Giga bit speeds, 125Mhz clocks can be | ||
wired up in from different sources. One via TXCLK pin and other via CLK_125 | ||
pin. This wiring is totally board dependent. However the retiming glue | ||
logic should be configured accordingly. Possible values for this property | ||
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"txclk" - if 125Mhz clock is wired up via txclk line. | ||
"clk_125" - if 125Mhz clock is wired up via clk_125 line. | ||
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This property is only valid for Giga bit setup( GMII, RGMII), and it is | ||
un-used for non-giga bit (MII and RMII) setups. Also note that internal | ||
clockgen can not generate stable 125Mhz clock. | ||
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- st,ext-phyclk: This boolean property indicates who is generating the clock | ||
for tx and rx. This property is only valid for RMII case where the clock can | ||
be generated from the MAC or PHY. | ||
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- clock-names: should be "sti-ethclk". | ||
- clocks: Should point to ethernet clockgen which can generate phyclk. | ||
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Example: | ||
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ethernet0: dwmac@fe810000 { | ||
device_type = "network"; | ||
compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710"; | ||
reg = <0xfe810000 0x8000>, <0x8bc 0x4>; | ||
reg-names = "stmmaceth", "sti-ethconf"; | ||
interrupts = <0 133 0>, <0 134 0>, <0 135 0>; | ||
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; | ||
phy-mode = "mii"; | ||
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st,syscon = <&syscfg_rear>; | ||
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snps,pbl = <32>; | ||
snps,mixed-burst; | ||
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resets = <&softreset STIH416_ETH0_SOFTRESET>; | ||
reset-names = "stmmaceth"; | ||
pinctrl-0 = <&pinctrl_mii0>; | ||
pinctrl-names = "default"; | ||
clocks = <&CLK_S_GMAC0_PHY>; | ||
clock-names = "stmmaceth"; | ||
}; |
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