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yaml --- r: 226170 b: refs/heads/master c: 404a02c h: refs/heads/master v: v3
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Russell King
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Jan 6, 2011
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refs/heads/master: 1051b9f0f9eab8091fe3bf98320741adf36b4cfa | ||
refs/heads/master: 404a02cbd2ae8bf256a2fa1169bdfe86bb5ebb34 |
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Software emulation of deprecated SWP instruction (CONFIG_SWP_EMULATE) | ||
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ARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommeds | ||
moving to the load-locked/store-conditional instructions LDREX and STREX. | ||
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ARMv7 multiprocessing extensions introduce the ability to disable these | ||
instructions, triggering an undefined instruction exception when executed. | ||
Trapped instructions are emulated using an LDREX/STREX or LDREXB/STREXB | ||
sequence. If a memory access fault (an abort) occurs, a segmentation fault is | ||
signalled to the triggering process. | ||
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/proc/cpu/swp_emulation holds some statistics/information, including the PID of | ||
the last process to trigger the emulation to be invocated. For example: | ||
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Emulated SWP: 12 | ||
Emulated SWPB: 0 | ||
Aborted SWP{B}: 1 | ||
Last process: 314 | ||
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NOTE: when accessing uncached shared regions, LDREX/STREX rely on an external | ||
transaction monitoring block called a global monitor to maintain update | ||
atomicity. If your system does not implement a global monitor, this option can | ||
cause programs that perform SWP operations to uncached memory to deadlock, as | ||
the STREX operation will always fail. | ||
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