Skip to content

Commit

Permalink
---
Browse files Browse the repository at this point in the history
yaml
---
r: 226170
b: refs/heads/master
c: 404a02c
h: refs/heads/master
v: v3
  • Loading branch information
Russell King committed Jan 6, 2011
1 parent edf9ea7 commit 5f47853
Show file tree
Hide file tree
Showing 682 changed files with 9,174 additions and 5,905 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 1051b9f0f9eab8091fe3bf98320741adf36b4cfa
refs/heads/master: 404a02cbd2ae8bf256a2fa1169bdfe86bb5ebb34
1 change: 1 addition & 0 deletions trunk/Documentation/accounting/getdelays.c
Original file line number Diff line number Diff line change
Expand Up @@ -516,6 +516,7 @@ int main(int argc, char *argv[])
default:
fprintf(stderr, "Unknown nla_type %d\n",
na->nla_type);
case TASKSTATS_TYPE_NULL:
break;
}
na = (struct nlattr *) (GENLMSG_DATA(&msg) + len);
Expand Down
2 changes: 2 additions & 0 deletions trunk/Documentation/arm/00-INDEX
Original file line number Diff line number Diff line change
Expand Up @@ -34,3 +34,5 @@ memory.txt
- description of the virtual memory layout
nwfpe/
- NWFPE floating point emulator documentation
swp_emulation
- SWP/SWPB emulation handler/logging description
27 changes: 27 additions & 0 deletions trunk/Documentation/arm/swp_emulation
Original file line number Diff line number Diff line change
@@ -0,0 +1,27 @@
Software emulation of deprecated SWP instruction (CONFIG_SWP_EMULATE)
---------------------------------------------------------------------

ARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommeds
moving to the load-locked/store-conditional instructions LDREX and STREX.

ARMv7 multiprocessing extensions introduce the ability to disable these
instructions, triggering an undefined instruction exception when executed.
Trapped instructions are emulated using an LDREX/STREX or LDREXB/STREXB
sequence. If a memory access fault (an abort) occurs, a segmentation fault is
signalled to the triggering process.

/proc/cpu/swp_emulation holds some statistics/information, including the PID of
the last process to trigger the emulation to be invocated. For example:
---
Emulated SWP: 12
Emulated SWPB: 0
Aborted SWP{B}: 1
Last process: 314
---

NOTE: when accessing uncached shared regions, LDREX/STREX rely on an external
transaction monitoring block called a global monitor to maintain update
atomicity. If your system does not implement a global monitor, this option can
cause programs that perform SWP operations to uncached memory to deadlock, as
the STREX operation will always fail.

Loading

0 comments on commit 5f47853

Please sign in to comment.