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yaml
---
r: 116516
b: refs/heads/master
c: 9df08f1
h: refs/heads/master
v: v3
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Cyrill Gorcunov authored and Ingo Molnar committed Oct 16, 2008
1 parent 34284bf commit 5fbdd15
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Showing 2 changed files with 34 additions and 31 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: c87695ea74f21d180e1df3a1d00ac3dd432ea03b
refs/heads/master: 9df08f109572e88fbdab9a61d5cb0f0eae4ac9fa
63 changes: 33 additions & 30 deletions trunk/arch/x86/kernel/apic.c
Original file line number Diff line number Diff line change
Expand Up @@ -1081,40 +1081,43 @@ void __init init_bsp_APIC(void)

static void __cpuinit lapic_setup_esr(void)
{
unsigned long oldvalue, value, maxlvt;
if (lapic_is_integrated() && !esr_disable) {
if (esr_disable) {
/*
* Something untraceable is creating bad interrupts on
* secondary quads ... for the moment, just leave the
* ESR disabled - we can't do anything useful with the
* errors anyway - mbligh
*/
printk(KERN_INFO "Leaving ESR disabled.\n");
return;
}
/* !82489DX */
maxlvt = lapic_get_maxlvt();
if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
apic_write(APIC_ESR, 0);
oldvalue = apic_read(APIC_ESR);
unsigned int oldvalue, value, maxlvt;

if (!lapic_is_integrated()) {
printk(KERN_INFO "No ESR for 82489DX.\n");
return;
}

/* enables sending errors */
value = ERROR_APIC_VECTOR;
apic_write(APIC_LVTERR, value);
if (esr_disable) {
/*
* spec says clear errors after enabling vector.
* Something untraceable is creating bad interrupts on
* secondary quads ... for the moment, just leave the
* ESR disabled - we can't do anything useful with the
* errors anyway - mbligh
*/
if (maxlvt > 3)
apic_write(APIC_ESR, 0);
value = apic_read(APIC_ESR);
if (value != oldvalue)
apic_printk(APIC_VERBOSE, "ESR value before enabling "
"vector: 0x%08lx after: 0x%08lx\n",
oldvalue, value);
} else {
printk(KERN_INFO "No ESR for 82489DX.\n");
printk(KERN_INFO "Leaving ESR disabled.\n");
return;
}

maxlvt = lapic_get_maxlvt();
if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
apic_write(APIC_ESR, 0);
oldvalue = apic_read(APIC_ESR);

/* enables sending errors */
value = ERROR_APIC_VECTOR;
apic_write(APIC_LVTERR, value);

/*
* spec says clear errors after enabling vector.
*/
if (maxlvt > 3)
apic_write(APIC_ESR, 0);
value = apic_read(APIC_ESR);
if (value != oldvalue)
apic_printk(APIC_VERBOSE, "ESR value before enabling "
"vector: 0x%08x after: 0x%08x\n",
oldvalue, value);
}


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