---

yaml
---
r: 282765
b: refs/heads/master
c: f3572db
h: refs/heads/master
i:
  282763: 63cfc9c
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: c99afa25b67339b5fa7ef3767398878be9f60e1f
+refs/heads/master: f3572db823decfd747e6afd4c4ddfd67e8af8b6d

trunk/drivers/iommu/amd_iommu.c

@@ -2958,6 +2958,8 @@ static int amd_iommu_domain_init(struct iommu_domain *dom)
 	if (!domain->pt_root)
 		goto out_free;
 
+	domain->iommu_domain = dom;
+
 	dom->priv = domain;
 
 	return 0;
@@ -3463,3 +3465,19 @@ int amd_iommu_complete_ppr(struct pci_dev *pdev, int pasid,
 	return iommu_queue_command(iommu, &cmd);
 }
 EXPORT_SYMBOL(amd_iommu_complete_ppr);
+
+struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev)
+{
+	struct protection_domain *domain;
+
+	domain = get_domain(&pdev->dev);
+	if (IS_ERR(domain))
+		return NULL;
+
+	/* Only return IOMMUv2 domains */
+	if (!(domain->flags & PD_IOMMUV2_MASK))
+		return NULL;
+
+	return domain->iommu_domain;
+}
+EXPORT_SYMBOL(amd_iommu_get_v2_domain);

trunk/drivers/iommu/amd_iommu_proto.h

@@ -46,6 +46,7 @@ extern int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid);
 extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid,
 				     unsigned long cr3);
 extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid);
+extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev);
 
 #define PPR_SUCCESS			0x0
 #define PPR_INVALID			0x1

trunk/drivers/iommu/amd_iommu_types.h

@@ -360,6 +360,8 @@ struct amd_iommu_fault {
 #define PPR_FAULT_RSVD  (1 << 7)
 #define PPR_FAULT_GN    (1 << 8)
 
+struct iommu_domain;
+
 /*
  * This structure contains generic data for  IOMMU protection domains
  * independent of their use.
@@ -379,6 +381,8 @@ struct protection_domain {
 	unsigned dev_cnt;	/* devices assigned to this domain */
 	unsigned dev_iommu[MAX_IOMMUS]; /* per-IOMMU reference count */
 	void *priv;		/* private data */
+	struct iommu_domain *iommu_domain; /* Pointer to generic
+					      domain structure */
 
 };