---

yaml
---
r: 358079
b: refs/heads/master
c: 766aa1c
h: refs/heads/master
i:
  358077: 8222583
  358075: 4e2b8ad
  358071: 5057e03
  358063: 21cb074
  358047: 5360f33
  358015: 9459af7
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: d93c6233543cdab83eca4d0590737c3e99314fd6
+refs/heads/master: 766aa1c42362eafc53f5939cd3f83113e9d062ed

trunk/drivers/gpu/drm/i915/i915_drv.h

@@ -1887,4 +1887,14 @@ __i915_write(64, q)
 #define INTEL_BROADCAST_RGB_FULL 1
 #define INTEL_BROADCAST_RGB_LIMITED 2
 
+static inline uint32_t i915_vgacntrl_reg(struct drm_device *dev)
+{
+	if (HAS_PCH_SPLIT(dev))
+		return CPU_VGACNTRL;
+	else if (IS_VALLEYVIEW(dev))
+		return VLV_VGACNTRL;
+	else
+		return VGACNTRL;
+}
+
 #endif

trunk/drivers/gpu/drm/i915/i915_reg.h

@@ -3238,6 +3238,8 @@
 # define VGA_2X_MODE				(1 << 30)
 # define VGA_PIPE_B_SELECT			(1 << 29)
 
+#define VLV_VGACNTRL		(VLV_DISPLAY_BASE + 0x71400)
+
 /* Ironlake */
 
 #define CPU_VGACNTRL	0x41000

trunk/drivers/gpu/drm/i915/i915_suspend.c

@@ -73,10 +73,7 @@ static void i915_save_vga(struct drm_device *dev)
 	dev_priv->regfile.saveVGA0 = I915_READ(VGA0);
 	dev_priv->regfile.saveVGA1 = I915_READ(VGA1);
 	dev_priv->regfile.saveVGA_PD = I915_READ(VGA_PD);
-	if (HAS_PCH_SPLIT(dev))
-		dev_priv->regfile.saveVGACNTRL = I915_READ(CPU_VGACNTRL);
-	else
-		dev_priv->regfile.saveVGACNTRL = I915_READ(VGACNTRL);
+	dev_priv->regfile.saveVGACNTRL = I915_READ(i915_vgacntrl_reg(dev));
 
 	/* VGA color palette registers */
 	dev_priv->regfile.saveDACMASK = I915_READ8(VGA_DACMASK);
@@ -137,10 +134,7 @@ static void i915_restore_vga(struct drm_device *dev)
 	u16 cr_index, cr_data, st01;
 
 	/* VGA state */
-	if (HAS_PCH_SPLIT(dev))
-		I915_WRITE(CPU_VGACNTRL, dev_priv->regfile.saveVGACNTRL);
-	else
-		I915_WRITE(VGACNTRL, dev_priv->regfile.saveVGACNTRL);
+	I915_WRITE(i915_vgacntrl_reg(dev), dev_priv->regfile.saveVGACNTRL);
 
 	I915_WRITE(VGA0, dev_priv->regfile.saveVGA0);
 	I915_WRITE(VGA1, dev_priv->regfile.saveVGA1);

trunk/drivers/gpu/drm/i915/intel_display.c

@@ -8670,12 +8670,7 @@ static void i915_disable_vga(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u8 sr1;
-	u32 vga_reg;
-
-	if (HAS_PCH_SPLIT(dev))
-		vga_reg = CPU_VGACNTRL;
-	else
-		vga_reg = VGACNTRL;
+	u32 vga_reg = i915_vgacntrl_reg(dev);
 
 	vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
 	outb(SR01, VGA_SR_INDEX);
@@ -8937,12 +8932,7 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder)
 void i915_redisable_vga(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	u32 vga_reg;
-
-	if (HAS_PCH_SPLIT(dev))
-		vga_reg = CPU_VGACNTRL;
-	else
-		vga_reg = VGACNTRL;
+	u32 vga_reg = i915_vgacntrl_reg(dev);
 
 	if (I915_READ(vga_reg) != VGA_DISP_DISABLE) {
 		DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");