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hwmon: (k8temp) Remove superfluous CPU family check
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The family check in k8temp is not required because the driver is
already bound to a northbridge device only used with K8 CPUs.

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Andreas Herrmann authored and Jean Delvare committed Oct 28, 2010
1 parent 8128057 commit 628b450
Showing 1 changed file with 22 additions and 29 deletions.
51 changes: 22 additions & 29 deletions drivers/hwmon/k8temp.c
Original file line number Diff line number Diff line change
Expand Up @@ -191,38 +191,31 @@ static int __devinit k8temp_probe(struct pci_dev *pdev,
model = boot_cpu_data.x86_model;
stepping = boot_cpu_data.x86_mask;

switch (boot_cpu_data.x86) {
case 0xf:
/* feature available since SH-C0, exclude older revisions */
if (((model == 4) && (stepping == 0)) ||
((model == 5) && (stepping <= 1))) {
err = -ENODEV;
goto exit_free;
}

/*
* AMD NPT family 0fh, i.e. RevF and RevG:
* meaning of SEL_CORE bit is inverted
*/
if (model >= 0x40) {
data->swap_core_select = 1;
dev_warn(&pdev->dev, "Temperature readouts might be "
"wrong - check erratum #141\n");
}

if (is_rev_g_desktop(model)) {
/*
* RevG desktop CPUs (i.e. no socket S1G1 or
* ASB1 parts) need additional offset,
* otherwise reported temperature is below
* ambient temperature
*/
data->temp_offset = 21000;
}
/* feature available since SH-C0, exclude older revisions */
if (((model == 4) && (stepping == 0)) ||
((model == 5) && (stepping <= 1))) {
err = -ENODEV;
goto exit_free;
}

break;
/*
* AMD NPT family 0fh, i.e. RevF and RevG:
* meaning of SEL_CORE bit is inverted
*/
if (model >= 0x40) {
data->swap_core_select = 1;
dev_warn(&pdev->dev, "Temperature readouts might be wrong - "
"check erratum #141\n");
}

/*
* RevG desktop CPUs (i.e. no socket S1G1 or ASB1 parts) need
* additional offset, otherwise reported temperature is below
* ambient temperature
*/
if (is_rev_g_desktop(model))
data->temp_offset = 21000;

pci_read_config_byte(pdev, REG_TEMP, &scfg);
scfg &= ~(SEL_PLACE | SEL_CORE); /* Select sensor 0, core0 */
pci_write_config_byte(pdev, REG_TEMP, scfg);
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