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cpm2: Fix race condition in CPM2 GPIO library.
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The CPM2 GPIO library code uses the non thread-safe clrbits32/setbits32
macros. This patch protects them with a spinlock.

Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Laurent Pinchart authored and Kumar Gala committed Aug 21, 2008
1 parent 61a4e9e commit 639d644
Showing 1 changed file with 26 additions and 11 deletions.
37 changes: 26 additions & 11 deletions arch/powerpc/sysdev/cpm_common.c
Original file line number Diff line number Diff line change
Expand Up @@ -254,51 +254,66 @@ static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
return !!(in_be32(&iop->dat) & pin_mask);
}

static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
static void __cpm2_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,
int value)
{
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
struct cpm2_ioports __iomem *iop = mm_gc->regs;
unsigned long flags;
u32 pin_mask = 1 << (31 - gpio);

spin_lock_irqsave(&cpm2_gc->lock, flags);

if (value)
cpm2_gc->cpdata |= pin_mask;
else
cpm2_gc->cpdata &= ~pin_mask;

out_be32(&iop->dat, cpm2_gc->cpdata);
}

static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
{
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
unsigned long flags;
u32 pin_mask = 1 << (31 - gpio);

spin_lock_irqsave(&cpm2_gc->lock, flags);

__cpm2_gpio32_set(mm_gc, pin_mask, value);

spin_unlock_irqrestore(&cpm2_gc->lock, flags);
}

static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
{
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
struct cpm2_ioports __iomem *iop = mm_gc->regs;
u32 pin_mask;
unsigned long flags;
u32 pin_mask = 1 << (31 - gpio);

pin_mask = 1 << (31 - gpio);
spin_lock_irqsave(&cpm2_gc->lock, flags);

setbits32(&iop->dir, pin_mask);
__cpm2_gpio32_set(mm_gc, pin_mask, val);

cpm2_gpio32_set(gc, gpio, val);
spin_unlock_irqrestore(&cpm2_gc->lock, flags);

return 0;
}

static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
{
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
struct cpm2_ioports __iomem *iop = mm_gc->regs;
u32 pin_mask;
unsigned long flags;
u32 pin_mask = 1 << (31 - gpio);

pin_mask = 1 << (31 - gpio);
spin_lock_irqsave(&cpm2_gc->lock, flags);

clrbits32(&iop->dir, pin_mask);

spin_unlock_irqrestore(&cpm2_gc->lock, flags);

return 0;
}

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