---

yaml
---
r: 68223
b: refs/heads/master
c: 0dc3fc0
h: refs/heads/master
i:
  68221: e7b2cb3
  68219: d216091
  68215: d99e753
  68207: d7642a5
  68191: 934749f
  68159: ef5704c
  68095: 0004d0f
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: c4773bc2a011efa9abe2027f6959106d6f911889
+refs/heads/master: 0dc3fc04dd0251aa95b49ca7048e9e8f24291166

trunk/arch/sh/kernel/cpu/sh2/setup-sh7619.c

@@ -12,6 +12,61 @@
 #include <linux/serial.h>
 #include <asm/sci.h>
 
+enum {
+	UNUSED = 0,
+
+	/* interrupt sources */
+	IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
+	WDT, EDMAC, CMT0, CMT1,
+	SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
+	SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
+	SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
+	HIF_HIFI, HIF_HIFBI,
+	DMAC0, DMAC1, DMAC2, DMAC3,
+	SIOF,
+
+	/* interrupt groups */
+	SCIF0, SCIF1, SCIF2,
+};
+
+static struct intc_vect vectors[] __initdata = {
+	INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
+	INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
+	INTC_IRQ(IRQ4, 80), INTC_IRQ(IRQ5, 81),
+	INTC_IRQ(IRQ6, 82), INTC_IRQ(IRQ7, 83),
+	INTC_IRQ(WDT, 84), INTC_IRQ(EDMAC, 85),
+	INTC_IRQ(CMT0, 86), INTC_IRQ(CMT1, 87),
+	INTC_IRQ(SCIF0_ERI, 88), INTC_IRQ(SCIF0_RXI, 89),
+	INTC_IRQ(SCIF0_BRI, 90), INTC_IRQ(SCIF0_TXI, 91),
+	INTC_IRQ(SCIF1_ERI, 92), INTC_IRQ(SCIF1_RXI, 93),
+	INTC_IRQ(SCIF1_BRI, 94), INTC_IRQ(SCIF1_TXI, 95),
+	INTC_IRQ(SCIF2_ERI, 96), INTC_IRQ(SCIF2_RXI, 97),
+	INTC_IRQ(SCIF2_BRI, 98), INTC_IRQ(SCIF2_TXI, 99),
+	INTC_IRQ(HIF_HIFI, 100), INTC_IRQ(HIF_HIFBI, 101),
+	INTC_IRQ(DMAC0, 104), INTC_IRQ(DMAC1, 105),
+	INTC_IRQ(DMAC2, 106), INTC_IRQ(DMAC3, 107),
+	INTC_IRQ(SIOF, 108),
+};
+
+static struct intc_group groups[] __initdata = {
+	INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
+	INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
+	INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
+};
+
+static struct intc_prio_reg prio_registers[] __initdata = {
+	{ 0xf8140006, 0, 16, 4, /* IPRA */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
+	{ 0xf8140008, 0, 16, 4, /* IPRB */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
+	{ 0xf8080000, 0, 16, 4, /* IPRC */ { WDT, EDMAC, CMT0, CMT1 } },
+	{ 0xf8080002, 0, 16, 4, /* IPRD */ { SCIF0, SCIF1, SCIF2 } },
+	{ 0xf8080004, 0, 16, 4, /* IPRE */ { HIF_HIFI, HIF_HIFBI } },
+	{ 0xf8080006, 0, 16, 4, /* IPRF */ { DMAC0, DMAC1, DMAC2, DMAC3 } },
+	{ 0xf8080008, 0, 16, 4, /* IPRG */ { SIOF } },
+};
+
+static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, groups,
+			 NULL, NULL, prio_registers, NULL);
+
 static struct plat_sci_port sci_platform_data[] = {
 	{
 		.mapbase	= 0xf8400000,
@@ -52,43 +107,7 @@ static int __init sh7619_devices_setup(void)
 }
 __initcall(sh7619_devices_setup);
 
-static struct ipr_data ipr_irq_table[] = {
-	{ 86, 0,  4, 2 },	/* CMI0 */
-	{ 88, 1, 12, 3 },	/* SCIF0_ERI */
-	{ 89, 1, 12, 3 },	/* SCIF0_RXI */
-	{ 90, 1, 12, 3 },	/* SCIF0_BRI */
-	{ 91, 1, 12, 3 },	/* SCIF0_TXI */
-	{ 92, 1,  8, 3 },	/* SCIF1_ERI */
-	{ 93, 1,  8, 3 },	/* SCIF1_RXI */
-	{ 94, 1,  8, 3 },	/* SCIF1_BRI */
-	{ 95, 1,  8, 3 },	/* SCIF1_TXI */
-	{ 96, 1,  4, 3 },	/* SCIF2_ERI */
-	{ 97, 1,  4, 3 },	/* SCIF2_RXI */
-	{ 98, 1,  4, 3 },	/* SCIF2_BRI */
-	{ 99, 1,  4, 3 },	/* SCIF2_TXI */
-};
-
-static unsigned long ipr_offsets[] = {
-	0xf8080000,	/* IPRC */
-	0xf8080002,	/* IPRD */
-	0xf8080004,	/* IPRE */
-	0xf8080006,	/* IPRF */
-	0xf8080008,	/* IPRG */
-};
-
-static struct ipr_desc ipr_irq_desc = {
-	.ipr_offsets	= ipr_offsets,
-	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
-
-	.ipr_data	= ipr_irq_table,
-	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
-
-	.chip = {
-		.name	= "IPR-sh7619",
-	},
-};
-
 void __init plat_irq_setup(void)
 {
-	register_ipr_controller(&ipr_irq_desc);
+	register_intc_controller(&intc_desc);
 }

trunk/arch/sh/mm/Kconfig

@@ -50,7 +50,7 @@ choice
 config CPU_SUBTYPE_SH7619
 	bool "Support SH7619 processor"
 	select CPU_SH2
-	select CPU_HAS_IPR_IRQ
+	select CPU_HAS_INTC_IRQ
 
 # SH-2A Processor Support