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yaml
---
r: 360104
b: refs/heads/master
c: e9c0d0a
h: refs/heads/master
v: v3
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Gabor Juhos authored and John Crispin committed Feb 19, 2013
1 parent e88e576 commit 647ca73
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Showing 4 changed files with 25 additions and 2 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 13992303fa705ae1e4acf4660c69687672996029
refs/heads/master: e9c0d0aaa3a7a6e66135e8b44f3323143a635098
2 changes: 1 addition & 1 deletion trunk/arch/mips/ath79/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -108,7 +108,7 @@ config ATH79_DEV_USB
def_bool n

config ATH79_DEV_WMAC
depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X)
depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X)
def_bool n

endif
20 changes: 20 additions & 0 deletions trunk/arch/mips/ath79/dev-wmac.c
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Expand Up @@ -116,6 +116,24 @@ static void ar934x_wmac_setup(void)
ath79_wmac_data.is_clk_25mhz = true;
}

static void qca955x_wmac_setup(void)
{
u32 t;

ath79_wmac_device.name = "qca955x_wmac";

ath79_wmac_resources[0].start = QCA955X_WMAC_BASE;
ath79_wmac_resources[0].end = QCA955X_WMAC_BASE + QCA955X_WMAC_SIZE - 1;
ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1);

t = ath79_reset_rr(QCA955X_RESET_REG_BOOTSTRAP);
if (t & QCA955X_BOOTSTRAP_REF_CLK_40)
ath79_wmac_data.is_clk_25mhz = false;
else
ath79_wmac_data.is_clk_25mhz = true;
}

void __init ath79_register_wmac(u8 *cal_data)
{
if (soc_is_ar913x())
Expand All @@ -124,6 +142,8 @@ void __init ath79_register_wmac(u8 *cal_data)
ar933x_wmac_setup();
else if (soc_is_ar934x())
ar934x_wmac_setup();
else if (soc_is_qca955x())
qca955x_wmac_setup();
else
BUG();

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3 changes: 3 additions & 0 deletions trunk/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
Original file line number Diff line number Diff line change
Expand Up @@ -94,6 +94,9 @@
#define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000)
#define AR934X_SRIF_SIZE 0x1000

#define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
#define QCA955X_WMAC_SIZE 0x20000

/*
* DDR_CTRL block
*/
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