---

yaml
---
r: 350534
b: refs/heads/master
c: a6a16d2
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: ac652d7941f84c24cb27378aefbb4015f4c1da67
+refs/heads/master: a6a16d274e734afa769a9651dfaf8315d404c116

trunk/drivers/pinctrl/pinctrl-ab8500.c

@@ -456,9 +456,9 @@ struct alternate_functions ab8500_alternate_functions[AB8500_GPIO_MAX_NUMBER + 1
  *	GPIO36 to GPIO41
  */
 struct abx500_gpio_irq_cluster ab8500_gpio_irq_cluster[] = {
-	GPIO_IRQ_CLUSTER(6, 13, 0),
-	GPIO_IRQ_CLUSTER(24, 25, 0),
-	GPIO_IRQ_CLUSTER(36, 41, 0),
+	GPIO_IRQ_CLUSTER(6,  13, 34),
+	GPIO_IRQ_CLUSTER(24, 25, 24),
+	GPIO_IRQ_CLUSTER(36, 41, 14),
 };
 
 static struct abx500_pinctrl_soc_data ab8500_soc = {

trunk/drivers/pinctrl/pinctrl-ab8505.c

@@ -349,11 +349,11 @@ struct alternate_functions ab8505_alternate_functions[AB8505_GPIO_MAX_NUMBER + 1
  *	GPIO52 to GPIO53
  */
 struct abx500_gpio_irq_cluster ab8505_gpio_irq_cluster[] = {
-	GPIO_IRQ_CLUSTER(10, 11, 0),
-	GPIO_IRQ_CLUSTER(13, 13, 0),
-	GPIO_IRQ_CLUSTER(40, 41, 0),
-	GPIO_IRQ_CLUSTER(50, 50, 0),
-	GPIO_IRQ_CLUSTER(52, 53, 0),
+	GPIO_IRQ_CLUSTER(10, 11, 34),
+	GPIO_IRQ_CLUSTER(13, 13, 34),
+	GPIO_IRQ_CLUSTER(40, 41, 14),
+	GPIO_IRQ_CLUSTER(50, 50, 63),
+	GPIO_IRQ_CLUSTER(52, 53, 63),
 };
 
 static struct abx500_pinctrl_soc_data ab8505_soc = {

trunk/drivers/pinctrl/pinctrl-ab8540.c

@@ -377,8 +377,9 @@ static struct pullud ab8540_pullud = {
  *	GPIO51 to GPIO54
  */
 struct abx500_gpio_irq_cluster ab8540_gpio_irq_cluster[] = {
-	GPIO_IRQ_CLUSTER(43, 44, 2),
-	GPIO_IRQ_CLUSTER(51, 54, 0),
+	GPIO_IRQ_CLUSTER(43, 43, 126),
+	GPIO_IRQ_CLUSTER(44, 44, 127),
+	GPIO_IRQ_CLUSTER(51, 54, 63),
 };
 
 static struct abx500_pinctrl_soc_data ab8540_soc = {

trunk/drivers/pinctrl/pinctrl-ab9540.c

@@ -455,10 +455,10 @@ struct alternate_functions ab9540alternate_functions[AB9540_GPIO_MAX_NUMBER + 1]
 };
 
 struct abx500_gpio_irq_cluster ab9540_gpio_irq_cluster[] = {
-	GPIO_IRQ_CLUSTER(10, 13, 0),
-	GPIO_IRQ_CLUSTER(24, 25, 0),
-	GPIO_IRQ_CLUSTER(40, 41, 0),
-	GPIO_IRQ_CLUSTER(50, 54, 0),
+	GPIO_IRQ_CLUSTER(10, 13, 34),
+	GPIO_IRQ_CLUSTER(24, 25, 24),
+	GPIO_IRQ_CLUSTER(40, 41, 14),
+	GPIO_IRQ_CLUSTER(50, 54, 63),
 };
 
 static struct abx500_pinctrl_soc_data ab9540_soc = {

trunk/drivers/pinctrl/pinctrl-abx500.c

@@ -100,7 +100,6 @@ struct abx500_pinctrl {
 	struct gpio_chip chip;
 	struct ab8500 *parent;
 	struct mutex lock;
-	u32 irq_base;
 	struct abx500_gpio_irq_cluster *irq_cluster;
 	int irq_cluster_size;
 };
@@ -262,18 +261,24 @@ static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
 	struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
 	/* The AB8500 GPIO numbers are off by one */
 	int gpio = offset + 1;
-	int base = pct->irq_base;
+	int hwirq;
 	int i;
 
 	for (i = 0; i < pct->irq_cluster_size; i++) {
 		struct abx500_gpio_irq_cluster *cluster =
 			&pct->irq_cluster[i];
 
-		if (gpio >= cluster->start && gpio <= cluster->end)
-			return base + gpio - cluster->start;
+		if (gpio >= cluster->start && gpio <= cluster->end) {
+			/*
+			 * The ABx500 GPIO's associated IRQs are clustered together
+			 * throughout the interrupt numbers at irregular intervals.
+			 * To solve this quandry, we have placed the read-in values
+			 * into the cluster information table.
+			 */
+			hwirq = gpio + cluster->to_irq;
 
-		/* Advance by the number of gpios in this cluster */
-		base += cluster->end + cluster->offset - cluster->start + 1;
+			return irq_create_mapping(pct->parent->domain, hwirq);
+		}
 	}
 
 	return -EINVAL;
@@ -876,7 +881,6 @@ static int abx500_gpio_probe(struct platform_device *pdev)
 	pct->chip = abx500gpio_chip;
 	pct->chip.dev = &pdev->dev;
 	pct->chip.base = pdata->gpio_base;
-	pct->irq_base = pdata->irq_base;
 	pct->chip.base = (np) ? -1 : pdata->gpio_base;
 
 	/* initialize the lock */

trunk/drivers/pinctrl/pinctrl-abx500.h

@@ -98,22 +98,24 @@ struct pullud {
 {					\
 	.start = a,			\
 	.end = b,			\
-	.offset = c,			\
+	.to_irq = c,			\
 }
 
 /**
  * struct abx500_gpio_irq_cluster - indicates GPIOs which are interrupt
  *			capable
  * @start:		The pin number of the first pin interrupt capable
  * @end:		The pin number of the last pin interrupt capable
- * @offset:		offset used to compute specific setting strategy of
- *			the interrupt line
+ * @to_irq:		The ABx500 GPIO's associated IRQs are clustered
+ *                      together throughout the interrupt numbers at irregular
+ *                      intervals. To solve this quandary, we will place the
+ *                      read-in values into the cluster information table
  */
 
 struct abx500_gpio_irq_cluster {
 	int start;
 	int end;
-	int offset;
+	int to_irq;
 };
 
 /**