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[ARM] S3C24XX: Split PM code from arch/arm/plat-s3c24xx/irq.c
Split the PM code out of arch/arm/plat-s3c24xx/irq.c to remove some of the #ifdefs being used. Also fix a couple of places where the absecnce of a function was redefined to the same thing. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks
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Mar 8, 2009
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,116 @@ | ||
| /* linux/arch/arm/plat-s3c24xx/irq-om.c | ||
| * | ||
| * Copyright (c) 2003,2004 Simtec Electronics | ||
| * Ben Dooks <ben@simtec.co.uk> | ||
| * http://armlinux.simtec.co.uk/ | ||
| * | ||
| * S3C24XX - IRQ PM code | ||
| * | ||
| * This program is free software; you can redistribute it and/or modify | ||
| * it under the terms of the GNU General Public License version 2 as | ||
| * published by the Free Software Foundation. | ||
| */ | ||
|
|
||
| #include <linux/init.h> | ||
| #include <linux/module.h> | ||
| #include <linux/interrupt.h> | ||
| #include <linux/sysdev.h> | ||
|
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| #include <plat/cpu.h> | ||
| #include <plat/pm.h> | ||
| #include <plat/irq.h> | ||
|
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| /* state for IRQs over sleep */ | ||
|
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| /* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources | ||
| * | ||
| * set bit to 1 in allow bitfield to enable the wakeup settings on it | ||
| */ | ||
|
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| unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL; | ||
| unsigned long s3c_irqwake_intmask = 0xffffffffL; | ||
| unsigned long s3c_irqwake_eintallow = 0x0000fff0L; | ||
| unsigned long s3c_irqwake_eintmask = 0xffffffffL; | ||
|
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||
| int | ||
| s3c_irq_wake(unsigned int irqno, unsigned int state) | ||
| { | ||
| unsigned long irqbit = 1 << (irqno - IRQ_EINT0); | ||
|
|
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| if (!(s3c_irqwake_intallow & irqbit)) | ||
| return -ENOENT; | ||
|
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| printk(KERN_INFO "wake %s for irq %d\n", | ||
| state ? "enabled" : "disabled", irqno); | ||
|
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| if (!state) | ||
| s3c_irqwake_intmask |= irqbit; | ||
| else | ||
| s3c_irqwake_intmask &= ~irqbit; | ||
|
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| return 0; | ||
| } | ||
|
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| int s3c_irqext_wake(unsigned int irqno, unsigned int state) | ||
| { | ||
| unsigned long bit = 1L << (irqno - EXTINT_OFF); | ||
|
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| if (!(s3c_irqwake_eintallow & bit)) | ||
| return -ENOENT; | ||
|
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| printk(KERN_INFO "wake %s for irq %d\n", | ||
| state ? "enabled" : "disabled", irqno); | ||
|
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| if (!state) | ||
| s3c_irqwake_eintmask |= bit; | ||
| else | ||
| s3c_irqwake_eintmask &= ~bit; | ||
|
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| return 0; | ||
| } | ||
|
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| static struct sleep_save irq_save[] = { | ||
| SAVE_ITEM(S3C2410_INTMSK), | ||
| SAVE_ITEM(S3C2410_INTSUBMSK), | ||
| }; | ||
|
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| /* the extint values move between the s3c2410/s3c2440 and the s3c2412 | ||
| * so we use an array to hold them, and to calculate the address of | ||
| * the register at run-time | ||
| */ | ||
|
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| static unsigned long save_extint[3]; | ||
| static unsigned long save_eintflt[4]; | ||
| static unsigned long save_eintmask; | ||
|
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| int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state) | ||
| { | ||
| unsigned int i; | ||
|
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| for (i = 0; i < ARRAY_SIZE(save_extint); i++) | ||
| save_extint[i] = __raw_readl(S3C24XX_EXTINT0 + (i*4)); | ||
|
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| for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) | ||
| save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4)); | ||
|
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| s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); | ||
| save_eintmask = __raw_readl(S3C24XX_EINTMASK); | ||
|
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| return 0; | ||
| } | ||
|
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| int s3c24xx_irq_resume(struct sys_device *dev) | ||
| { | ||
| unsigned int i; | ||
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| for (i = 0; i < ARRAY_SIZE(save_extint); i++) | ||
| __raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4)); | ||
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| for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) | ||
| __raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4)); | ||
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| s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); | ||
| __raw_writel(save_eintmask, S3C24XX_EINTMASK); | ||
|
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||
| return 0; | ||
| } |
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