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powerpc: Fix xmon for systems without MSR[RI]
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Based on patch by David Gibson <dwg@au1.ibm.com>

xmon has a longstanding bug on systems which are SMP-capable but lack
the MSR[RI] bit.  In these cases, xmon invoked by IPI on secondary
CPUs will not properly keep quiet, but will print stuff, thereby
garbling the primary xmon's output.  This patch fixes it, by ignoring
the RI bit if the processor does not support it.

There's already a version of this for 4xx upstream, which we'll need
to extend to other RI-lacking CPUs at some point.  For now this adds
Book3e processors to the mix.

Signed-off-by: Jimi Xenidis <jimix@pobox.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Jimi Xenidis authored and Benjamin Herrenschmidt committed Sep 29, 2011
1 parent bb36c44 commit 66857b3
Showing 1 changed file with 2 additions and 2 deletions.
4 changes: 2 additions & 2 deletions arch/powerpc/xmon/xmon.c
Original file line number Diff line number Diff line change
Expand Up @@ -340,8 +340,8 @@ int cpus_are_in_xmon(void)

static inline int unrecoverable_excp(struct pt_regs *regs)
{
#ifdef CONFIG_4xx
/* We have no MSR_RI bit on 4xx, so we simply return false */
#if defined(CONFIG_4xx) || defined(CONFIG_BOOK3E)
/* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */
return 0;
#else
return ((regs->msr & MSR_RI) == 0);
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