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r: 235120
b: refs/heads/master
c: 25ae21a
h: refs/heads/master
v: v3
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Sean Hefty authored and Roland Dreier committed Mar 15, 2011
1 parent 53eab6f commit 67c5cf0
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2 changes: 1 addition & 1 deletion [refs]
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---
refs/heads/master: 0f6e0e8448a16d8d22119ce91d8dd24b44865b51
refs/heads/master: 25ae21a10112875763c18b385624df713a288a05
1 change: 0 additions & 1 deletion trunk/.gitignore
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Expand Up @@ -28,7 +28,6 @@ modules.builtin
*.gz
*.bz2
*.lzma
*.xz
*.lzo
*.patch
*.gcno
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5 changes: 0 additions & 5 deletions trunk/Documentation/DocBook/filesystems.tmpl
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Expand Up @@ -82,11 +82,6 @@
</sect1>
</chapter>

<chapter id="fs_events">
<title>Events based on file descriptors</title>
!Efs/eventfd.c
</chapter>

<chapter id="sysfs">
<title>The Filesystem for Exporting Kernel Objects</title>
!Efs/sysfs/file.c
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31 changes: 0 additions & 31 deletions trunk/Documentation/RCU/whatisRCU.txt
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Expand Up @@ -849,37 +849,6 @@ All: lockdep-checked RCU-protected pointer access
See the comment headers in the source code (or the docbook generated
from them) for more information.

However, given that there are no fewer than four families of RCU APIs
in the Linux kernel, how do you choose which one to use? The following
list can be helpful:

a. Will readers need to block? If so, you need SRCU.

b. What about the -rt patchset? If readers would need to block
in an non-rt kernel, you need SRCU. If readers would block
in a -rt kernel, but not in a non-rt kernel, SRCU is not
necessary.

c. Do you need to treat NMI handlers, hardirq handlers,
and code segments with preemption disabled (whether
via preempt_disable(), local_irq_save(), local_bh_disable(),
or some other mechanism) as if they were explicit RCU readers?
If so, you need RCU-sched.

d. Do you need RCU grace periods to complete even in the face
of softirq monopolization of one or more of the CPUs? For
example, is your code subject to network-based denial-of-service
attacks? If so, you need RCU-bh.

e. Is your workload too update-intensive for normal use of
RCU, but inappropriate for other synchronization mechanisms?
If so, consider SLAB_DESTROY_BY_RCU. But please be careful!

f. Otherwise, use RCU.

Of course, this all assumes that you have determined that RCU is in fact
the right tool for your job.


8. ANSWERS TO QUICK QUIZZES

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93 changes: 0 additions & 93 deletions trunk/Documentation/devicetree/bindings/i2c/ce4100-i2c.txt

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28 changes: 0 additions & 28 deletions trunk/Documentation/devicetree/bindings/rtc/rtc-cmos.txt

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38 changes: 0 additions & 38 deletions trunk/Documentation/devicetree/bindings/x86/ce4100.txt

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26 changes: 0 additions & 26 deletions trunk/Documentation/devicetree/bindings/x86/interrupt.txt

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6 changes: 0 additions & 6 deletions trunk/Documentation/devicetree/bindings/x86/timer.txt

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20 changes: 0 additions & 20 deletions trunk/Documentation/devicetree/booting-without-of.txt
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Expand Up @@ -13,7 +13,6 @@ Table of Contents

I - Introduction
1) Entry point for arch/powerpc
2) Entry point for arch/x86

II - The DT block format
1) Header
Expand Down Expand Up @@ -226,25 +225,6 @@ it with special cases.
cannot support both configurations with Book E and configurations
with classic Powerpc architectures.

2) Entry point for arch/x86
-------------------------------

There is one single 32bit entry point to the kernel at code32_start,
the decompressor (the real mode entry point goes to the same 32bit
entry point once it switched into protected mode). That entry point
supports one calling convention which is documented in
Documentation/x86/boot.txt
The physical pointer to the device-tree block (defined in chapter II)
is passed via setup_data which requires at least boot protocol 2.09.
The type filed is defined as

#define SETUP_DTB 2

This device-tree is used as an extension to the "boot page". As such it
does not parse / consider data which is already covered by the boot
page. This includes memory size, reserved ranges, command line arguments
or initrd address. It simply holds information which can not be retrieved
otherwise like interrupt routing or a list of devices behind an I2C bus.

II - The DT block format
========================
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21 changes: 6 additions & 15 deletions trunk/Documentation/hwmon/jc42
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Expand Up @@ -51,8 +51,7 @@ Supported chips:
* JEDEC JC 42.4 compliant temperature sensor chips
Prefix: 'jc42'
Addresses scanned: I2C 0x18 - 0x1f
Datasheet:
http://www.jedec.org/sites/default/files/docs/4_01_04R19.pdf
Datasheet: -

Author:
Guenter Roeck <guenter.roeck@ericsson.com>
Expand All @@ -61,11 +60,7 @@ Author:
Description
-----------

This driver implements support for JEDEC JC 42.4 compliant temperature sensors,
which are used on many DDR3 memory modules for mobile devices and servers. Some
systems use the sensor to prevent memory overheating by automatically throttling
the memory controller.

This driver implements support for JEDEC JC 42.4 compliant temperature sensors.
The driver auto-detects the chips listed above, but can be manually instantiated
to support other JC 42.4 compliant chips.

Expand All @@ -86,19 +81,15 @@ limits. The chip supports only a single register to configure the hysteresis,
which applies to all limits. This register can be written by writing into
temp1_crit_hyst. Other hysteresis attributes are read-only.

If the BIOS has configured the sensor for automatic temperature management, it
is likely that it has locked the registers, i.e., that the temperature limits
cannot be changed.

Sysfs entries
-------------

temp1_input Temperature (RO)
temp1_min Minimum temperature (RO or RW)
temp1_max Maximum temperature (RO or RW)
temp1_crit Critical high temperature (RO or RW)
temp1_min Minimum temperature (RW)
temp1_max Maximum temperature (RW)
temp1_crit Critical high temperature (RW)

temp1_crit_hyst Critical hysteresis temperature (RO or RW)
temp1_crit_hyst Critical hysteresis temperature (RW)
temp1_max_hyst Maximum hysteresis temperature (RO)

temp1_min_alarm Temperature low alarm
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8 changes: 1 addition & 7 deletions trunk/Documentation/hwmon/k10temp
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Expand Up @@ -9,8 +9,6 @@ Supported chips:
Socket S1G3: Athlon II, Sempron, Turion II
* AMD Family 11h processors:
Socket S1G2: Athlon (X2), Sempron (X2), Turion X2 (Ultra)
* AMD Family 12h processors: "Llano"
* AMD Family 14h processors: "Brazos" (C/E/G-Series)

Prefix: 'k10temp'
Addresses scanned: PCI space
Expand All @@ -19,14 +17,10 @@ Supported chips:
http://support.amd.com/us/Processor_TechDocs/31116.pdf
BIOS and Kernel Developer's Guide (BKDG) for AMD Family 11h Processors:
http://support.amd.com/us/Processor_TechDocs/41256.pdf
BIOS and Kernel Developer's Guide (BKDG) for AMD Family 14h Models 00h-0Fh Processors:
http://support.amd.com/us/Processor_TechDocs/43170.pdf
Revision Guide for AMD Family 10h Processors:
http://support.amd.com/us/Processor_TechDocs/41322.pdf
Revision Guide for AMD Family 11h Processors:
http://support.amd.com/us/Processor_TechDocs/41788.pdf
Revision Guide for AMD Family 14h Models 00h-0Fh Processors:
http://support.amd.com/us/Processor_TechDocs/47534.pdf
AMD Family 11h Processor Power and Thermal Data Sheet for Notebooks:
http://support.amd.com/us/Processor_TechDocs/43373.pdf
AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet:
Expand All @@ -40,7 +34,7 @@ Description
-----------

This driver permits reading of the internal temperature sensor of AMD
Family 10h/11h/12h/14h processors.
Family 10h and 11h processors.

All these processors have a sensor, but on those for Socket F or AM2+,
the sensor may return inconsistent values (erratum 319). The driver
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