[PATCH] ARM: bitops

Convert ARM bitop assembly to a macro. All bitops follow the same format, so it's silly duplicating the code when only one or two instructions are different. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
git-mirror · Apr 17, 2005 · 684f970 · 684f970
1 parent 652a12e
commit 684f970
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Showing 6 changed files with 12 additions and 68 deletions.
diff --git a/arch/arm/lib/changebit.S b/arch/arm/lib/changebit.S
@@ -9,6 +9,7 @@
  */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include "bitops.h"
                 .text
 
 /* Purpose  : Function to change a bit
@@ -17,12 +18,4 @@
 ENTRY(_change_bit_be)
 		eor	r0, r0, #0x18		@ big endian byte ordering
 ENTRY(_change_bit_le)
-		and	r2, r0, #7
-		mov	r3, #1
-		mov	r3, r3, lsl r2
-		save_and_disable_irqs ip, r2
-		ldrb	r2, [r1, r0, lsr #3]
-		eor	r2, r2, r3
-		strb	r2, [r1, r0, lsr #3]
-		restore_irqs ip
-		RETINSTR(mov,pc,lr)
+	bitop	eor
diff --git a/arch/arm/lib/clearbit.S b/arch/arm/lib/clearbit.S
@@ -9,6 +9,7 @@
  */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include "bitops.h"
                 .text
 
 /*
@@ -18,14 +19,4 @@
 ENTRY(_clear_bit_be)
 		eor	r0, r0, #0x18		@ big endian byte ordering
 ENTRY(_clear_bit_le)
-		and	r2, r0, #7
-		mov	r3, #1
-		mov	r3, r3, lsl r2
-		save_and_disable_irqs ip, r2
-		ldrb	r2, [r1, r0, lsr #3]
-		bic	r2, r2, r3
-		strb	r2, [r1, r0, lsr #3]
-		restore_irqs ip
-		RETINSTR(mov,pc,lr)
-
-
+	bitop	bic
diff --git a/arch/arm/lib/setbit.S b/arch/arm/lib/setbit.S
@@ -9,6 +9,7 @@
  */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include "bitops.h"
 		.text
 
 /*
@@ -18,12 +19,4 @@
 ENTRY(_set_bit_be)
 		eor	r0, r0, #0x18		@ big endian byte ordering
 ENTRY(_set_bit_le)
-		and	r2, r0, #7
-		mov	r3, #1
-		mov	r3, r3, lsl r2
-		save_and_disable_irqs ip, r2
-		ldrb	r2, [r1, r0, lsr #3]
-		orr	r2, r2, r3
-		strb	r2, [r1, r0, lsr #3]
-		restore_irqs ip
-		RETINSTR(mov,pc,lr)
+	bitop	orr
diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S
@@ -9,21 +9,10 @@
  */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include "bitops.h"
                 .text
 
 ENTRY(_test_and_change_bit_be)
 		eor	r0, r0, #0x18		@ big endian byte ordering
 ENTRY(_test_and_change_bit_le)
-		add	r1, r1, r0, lsr #3
-		and	r3, r0, #7
-		mov	r0, #1
-		save_and_disable_irqs ip, r2
-		ldrb	r2, [r1]
-		tst	r2, r0, lsl r3
-		eor	r2, r2, r0, lsl r3
-		strb	r2, [r1]
-		restore_irqs ip
-		moveq	r0, #0
-		RETINSTR(mov,pc,lr)
-
-
+	testop	eor, strb
diff --git a/arch/arm/lib/testclearbit.S b/arch/arm/lib/testclearbit.S
@@ -9,21 +9,10 @@
  */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include "bitops.h"
                 .text
 
 ENTRY(_test_and_clear_bit_be)
 		eor	r0, r0, #0x18		@ big endian byte ordering
 ENTRY(_test_and_clear_bit_le)
-		add	r1, r1, r0, lsr #3	@ Get byte offset
-		and	r3, r0, #7		@ Get bit offset
-		mov	r0, #1
-		save_and_disable_irqs ip, r2
-		ldrb	r2, [r1]
-		tst	r2, r0, lsl r3
-		bic	r2, r2, r0, lsl r3
-		strb	r2, [r1]
-		restore_irqs ip
-		moveq	r0, #0
-		RETINSTR(mov,pc,lr)
-
-
+	testop	bicne, strneb
diff --git a/arch/arm/lib/testsetbit.S b/arch/arm/lib/testsetbit.S
@@ -9,21 +9,10 @@
  */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include "bitops.h"
                 .text
 
 ENTRY(_test_and_set_bit_be)
 		eor	r0, r0, #0x18		@ big endian byte ordering
 ENTRY(_test_and_set_bit_le)
-		add	r1, r1, r0, lsr #3	@ Get byte offset
-		and	r3, r0, #7		@ Get bit offset
-		mov	r0, #1
-		save_and_disable_irqs ip, r2
-		ldrb	r2, [r1]
-		tst	r2, r0, lsl r3
-		orr	r2, r2, r0, lsl r3
-		strb	r2, [r1]
-		restore_irqs ip
-		moveq	r0, #0
-		RETINSTR(mov,pc,lr)
-
-
+	testop	orreq, streqb