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yaml
---
r: 327080
b: refs/heads/master
c: e895e49
h: refs/heads/master
v: v3
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Thomas Abraham authored and Kukjin Kim committed Sep 25, 2012
1 parent e788d70 commit 69263f3
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Showing 2 changed files with 17 additions and 30 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: a0cabc4017a78643e26d7bd79bcac548410f0480
refs/heads/master: e895e49ba9c0e6f5e3ca9eda9649cd8ed0fdeee3
45 changes: 16 additions & 29 deletions trunk/arch/arm/mach-exynos/clock-exynos5.c
Original file line number Diff line number Diff line change
Expand Up @@ -569,34 +569,29 @@ static struct clk exynos5_init_clocks_off[] = {
.enable = exynos5_clk_ip_peris_ctrl,
.ctrlbit = (1 << 19),
}, {
.name = "hsmmc",
.devname = "exynos4-sdhci.0",
.name = "biu", /* bus interface unit clock */
.devname = "dw_mmc.0",
.parent = &exynos5_clk_aclk_200.clk,
.enable = exynos5_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 12),
}, {
.name = "hsmmc",
.devname = "exynos4-sdhci.1",
.name = "biu",
.devname = "dw_mmc.1",
.parent = &exynos5_clk_aclk_200.clk,
.enable = exynos5_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 13),
}, {
.name = "hsmmc",
.devname = "exynos4-sdhci.2",
.name = "biu",
.devname = "dw_mmc.2",
.parent = &exynos5_clk_aclk_200.clk,
.enable = exynos5_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 14),
}, {
.name = "hsmmc",
.devname = "exynos4-sdhci.3",
.name = "biu",
.devname = "dw_mmc.3",
.parent = &exynos5_clk_aclk_200.clk,
.enable = exynos5_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 15),
}, {
.name = "dwmci",
.parent = &exynos5_clk_aclk_200.clk,
.enable = exynos5_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 16),
}, {
.name = "sata",
.devname = "ahci",
Expand Down Expand Up @@ -1015,8 +1010,8 @@ static struct clksrc_clk exynos5_clk_sclk_uart3 = {

static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
.clk = {
.name = "sclk_mmc",
.devname = "exynos4-sdhci.0",
.name = "ciu", /* card interface unit clock */
.devname = "dw_mmc.0",
.parent = &exynos5_clk_dout_mmc0.clk,
.enable = exynos5_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 0),
Expand All @@ -1026,8 +1021,8 @@ static struct clksrc_clk exynos5_clk_sclk_mmc0 = {

static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
.clk = {
.name = "sclk_mmc",
.devname = "exynos4-sdhci.1",
.name = "ciu",
.devname = "dw_mmc.1",
.parent = &exynos5_clk_dout_mmc1.clk,
.enable = exynos5_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 4),
Expand All @@ -1037,8 +1032,8 @@ static struct clksrc_clk exynos5_clk_sclk_mmc1 = {

static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
.clk = {
.name = "sclk_mmc",
.devname = "exynos4-sdhci.2",
.name = "ciu",
.devname = "dw_mmc.2",
.parent = &exynos5_clk_dout_mmc2.clk,
.enable = exynos5_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 8),
Expand All @@ -1048,8 +1043,8 @@ static struct clksrc_clk exynos5_clk_sclk_mmc2 = {

static struct clksrc_clk exynos5_clk_sclk_mmc3 = {
.clk = {
.name = "sclk_mmc",
.devname = "exynos4-sdhci.3",
.name = "ciu",
.devname = "dw_mmc.3",
.parent = &exynos5_clk_dout_mmc3.clk,
.enable = exynos5_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 12),
Expand Down Expand Up @@ -1122,14 +1117,6 @@ static struct clksrc_clk exynos5_clk_sclk_spi2 = {

static struct clksrc_clk exynos5_clksrcs[] = {
{
.clk = {
.name = "sclk_dwmci",
.parent = &exynos5_clk_dout_mmc4.clk,
.enable = exynos5_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 16),
},
.reg_div = { .reg = EXYNOS5_CLKDIV_FSYS3, .shift = 8, .size = 8 },
}, {
.clk = {
.name = "sclk_fimd",
.devname = "s3cfb.1",
Expand Down

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