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ARM: EXYNOS4: Add support for ORIGEN board
Insignal's ORIGEN board is based Samsung EXYNOS4210 SoC. Signed-off-by: JeongHyeon Kim <jhkim@insignal.co.kr> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> [kgene.kim@samsung.com: Fixed SoC name to EXYNOS4210] [kgene.kim@samsung.com: Selected MACH_ORIGEN in exynos4_defconfig] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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JeongHyeon Kim
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Jul 21, 2011
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| /* linux/arch/arm/mach-exynos4/mach-origen.c | ||
| * | ||
| * Copyright (c) 2011 Insignal Co., Ltd. | ||
| * http://www.insignal.co.kr/ | ||
| * | ||
| * This program is free software; you can redistribute it and/or modify | ||
| * it under the terms of the GNU General Public License version 2 as | ||
| * published by the Free Software Foundation. | ||
| */ | ||
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| #include <linux/serial_core.h> | ||
| #include <linux/gpio.h> | ||
| #include <linux/mmc/host.h> | ||
| #include <linux/platform_device.h> | ||
| #include <linux/io.h> | ||
| #include <linux/input.h> | ||
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| #include <asm/mach/arch.h> | ||
| #include <asm/mach-types.h> | ||
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| #include <plat/regs-serial.h> | ||
| #include <plat/exynos4.h> | ||
| #include <plat/cpu.h> | ||
| #include <plat/devs.h> | ||
| #include <plat/sdhci.h> | ||
| #include <plat/iic.h> | ||
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| #include <mach/map.h> | ||
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| /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
| #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
| S3C2410_UCON_RXILEVEL | \ | ||
| S3C2410_UCON_TXIRQMODE | \ | ||
| S3C2410_UCON_RXIRQMODE | \ | ||
| S3C2410_UCON_RXFIFO_TOI | \ | ||
| S3C2443_UCON_RXERR_IRQEN) | ||
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| #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
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| #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
| S5PV210_UFCON_TXTRIG4 | \ | ||
| S5PV210_UFCON_RXTRIG4) | ||
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| static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = { | ||
| [0] = { | ||
| .hwport = 0, | ||
| .flags = 0, | ||
| .ucon = ORIGEN_UCON_DEFAULT, | ||
| .ulcon = ORIGEN_ULCON_DEFAULT, | ||
| .ufcon = ORIGEN_UFCON_DEFAULT, | ||
| }, | ||
| [1] = { | ||
| .hwport = 1, | ||
| .flags = 0, | ||
| .ucon = ORIGEN_UCON_DEFAULT, | ||
| .ulcon = ORIGEN_ULCON_DEFAULT, | ||
| .ufcon = ORIGEN_UFCON_DEFAULT, | ||
| }, | ||
| [2] = { | ||
| .hwport = 2, | ||
| .flags = 0, | ||
| .ucon = ORIGEN_UCON_DEFAULT, | ||
| .ulcon = ORIGEN_ULCON_DEFAULT, | ||
| .ufcon = ORIGEN_UFCON_DEFAULT, | ||
| }, | ||
| [3] = { | ||
| .hwport = 3, | ||
| .flags = 0, | ||
| .ucon = ORIGEN_UCON_DEFAULT, | ||
| .ulcon = ORIGEN_ULCON_DEFAULT, | ||
| .ufcon = ORIGEN_UFCON_DEFAULT, | ||
| }, | ||
| }; | ||
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| static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = { | ||
| .cd_type = S3C_SDHCI_CD_GPIO, | ||
| .ext_cd_gpio = EXYNOS4_GPK2(2), | ||
| .ext_cd_gpio_invert = 1, | ||
| .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
| }; | ||
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| static struct platform_device *origen_devices[] __initdata = { | ||
| &s3c_device_hsmmc2, | ||
| &s3c_device_rtc, | ||
| &s3c_device_wdt, | ||
| }; | ||
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| static void __init origen_map_io(void) | ||
| { | ||
| s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
| s3c24xx_init_clocks(24000000); | ||
| s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs)); | ||
| } | ||
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| static void __init origen_machine_init(void) | ||
| { | ||
| s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata); | ||
| platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices)); | ||
| } | ||
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| MACHINE_START(ORIGEN, "ORIGEN") | ||
| /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */ | ||
| .boot_params = S5P_PA_SDRAM + 0x100, | ||
| .init_irq = exynos4_init_irq, | ||
| .map_io = origen_map_io, | ||
| .init_machine = origen_machine_init, | ||
| .timer = &exynos4_timer, | ||
| MACHINE_END |