---

yaml
---
r: 259103
b: refs/heads/master
c: 08871c0
h: refs/heads/master
i:
  259101: 597d530
  259099: 44bd6b7
  259095: 6e4f79b
  259087: 86c1ea2
  259071: 7ea23c9
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 3907ab26866006087c4d1e48e9d1306e281ec955
+refs/heads/master: 08871c097ea5a11c95146ba8310272571d2bbfc4

trunk/arch/powerpc/sysdev/fsl_pci.c

@@ -330,6 +330,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
 	struct pci_controller *hose;
 	struct resource rsrc;
 	const int *bus_range;
+	u8 progif;
 
 	if (!of_device_is_available(dev)) {
 		pr_warning("%s: disabled\n", dev->full_name);
@@ -360,6 +361,18 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
 
 	setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4,
 		PPC_INDIRECT_TYPE_BIG_ENDIAN);
+
+	early_read_config_byte(hose, 0, 0, PCI_CLASS_PROG, &progif);
+	if ((progif & 1) == 1) {
+		/* unmap cfg_data & cfg_addr separately if not on same page */
+		if (((unsigned long)hose->cfg_data & PAGE_MASK) !=
+		    ((unsigned long)hose->cfg_addr & PAGE_MASK))
+			iounmap(hose->cfg_data);
+		iounmap(hose->cfg_addr);
+		pcibios_free_controller(hose);
+		return 0;
+	}
+
 	setup_pci_cmd(hose);
 
 	/* check PCI express link status */