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Merge master.kernel.org:/home/rmk/linux-2.6-arm
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* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] 5460/1: Orion: reduce namespace pollution
  [ARM] 5458/1: pcmcia: pxa2xx-sharpsl: check if we do have Scoop config
  [ARM] 5457/1: mach-imx gpio buildfix
  [ARM] 5456/1: add sys_preadv and sys_pwritev
  [ARM] pxa/pcm990: start external GPIOs immediately after built-in ones
  [ARM] pxa/palm27x: General fix for Palm27x aSoC driver
  [ARM] pxa/mioa701: use GPIO95 as AC97 reset line
  [ARM] pxa: merge AC97 platform data structures
  [ARM] pxa/magician: remove un-necessary #include of pxa-regs.h and hardware.h
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Linus Torvalds committed Apr 24, 2009
2 parents d72cd3a + fdd8b07 commit 6ae85d6
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Showing 43 changed files with 326 additions and 184 deletions.
2 changes: 2 additions & 0 deletions arch/arm/include/asm/unistd.h
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Expand Up @@ -387,6 +387,8 @@
#define __NR_dup3 (__NR_SYSCALL_BASE+358)
#define __NR_pipe2 (__NR_SYSCALL_BASE+359)
#define __NR_inotify_init1 (__NR_SYSCALL_BASE+360)
#define __NR_preadv (__NR_SYSCALL_BASE+361)
#define __NR_pwritev (__NR_SYSCALL_BASE+362)

/*
* The following SWIs are ARM private.
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2 changes: 2 additions & 0 deletions arch/arm/kernel/calls.S
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Expand Up @@ -370,6 +370,8 @@
CALL(sys_dup3)
CALL(sys_pipe2)
/* 360 */ CALL(sys_inotify_init1)
CALL(sys_preadv)
CALL(sys_pwritev)
#ifndef syscalls_counted
.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
#define syscalls_counted
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1 change: 1 addition & 0 deletions arch/arm/mach-imx/include/mach/gpio.h
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@@ -1,6 +1,7 @@
#ifndef _IMX_GPIO_H

#include <linux/kernel.h>
#include <mach/hardware.h>
#include <mach/imx-regs.h>

#define IMX_GPIO_ALLOC_MODE_NORMAL 0
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1 change: 1 addition & 0 deletions arch/arm/mach-kirkwood/common.c
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Expand Up @@ -23,6 +23,7 @@
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <mach/kirkwood.h>
#include <mach/bridge-regs.h>
#include <plat/cache-feroceon-l2.h>
#include <plat/ehci-orion.h>
#include <plat/mvsdio.h>
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42 changes: 42 additions & 0 deletions arch/arm/mach-kirkwood/include/mach/bridge-regs.h
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@@ -0,0 +1,42 @@
/*
* arch/arm/mach-kirkwood/include/mach/bridge-regs.h
*
* Mbus-L to Mbus Bridge Registers
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/

#ifndef __ASM_ARCH_BRIDGE_REGS_H
#define __ASM_ARCH_BRIDGE_REGS_H

#include <mach/kirkwood.h>

#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104)
#define CPU_RESET 0x00000002

#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
#define SOFT_RESET_OUT_EN 0x00000004

#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
#define SOFT_RESET 0x00000001

#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
#define BRIDGE_INT_TIMER0 0x0002
#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR (~0x0004)

#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
#define IRQ_CAUSE_LOW_OFF 0x0000
#define IRQ_MASK_LOW_OFF 0x0004
#define IRQ_CAUSE_HIGH_OFF 0x0010
#define IRQ_MASK_HIGH_OFF 0x0014

#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)

#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128)
#define L2_WRITETHROUGH 0x00000010

#endif
2 changes: 1 addition & 1 deletion arch/arm/mach-kirkwood/include/mach/debug-macro.S
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Expand Up @@ -6,7 +6,7 @@
* published by the Free Software Foundation.
*/

#include <mach/kirkwood.h>
#include <mach/bridge-regs.h>

.macro addruart,rx
mrc p15, 0, \rx, c1, c0
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2 changes: 1 addition & 1 deletion arch/arm/mach-kirkwood/include/mach/entry-macro.S
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Expand Up @@ -8,7 +8,7 @@
* warranty of any kind, whether express or implied.
*/

#include <mach/kirkwood.h>
#include <mach/bridge-regs.h>

.macro disable_fiq
.endm
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53 changes: 15 additions & 38 deletions arch/arm/mach-kirkwood/include/mach/kirkwood.h
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Expand Up @@ -43,44 +43,6 @@
#define KIRKWOOD_PCIE_MEM_PHYS_BASE 0xe0000000
#define KIRKWOOD_PCIE_MEM_SIZE SZ_128M

/*
* MBUS bridge registers.
*/
#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104)
#define CPU_RESET 0x00000002
#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
#define SOFT_RESET_OUT_EN 0x00000004
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
#define SOFT_RESET 0x00000001
#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
#define BRIDGE_INT_TIMER0 0x0002
#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR (~0x0004)
#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
#define IRQ_CAUSE_LOW_OFF 0x0000
#define IRQ_MASK_LOW_OFF 0x0004
#define IRQ_CAUSE_HIGH_OFF 0x0010
#define IRQ_MASK_HIGH_OFF 0x0014
#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128)
#define L2_WRITETHROUGH 0x00000010

/*
* Supported devices and revisions.
*/
#define MV88F6281_DEV_ID 0x6281
#define MV88F6281_REV_Z0 0
#define MV88F6281_REV_A0 2

#define MV88F6192_DEV_ID 0x6192
#define MV88F6192_REV_Z0 0
#define MV88F6192_REV_A0 2

#define MV88F6180_DEV_ID 0x6180
#define MV88F6180_REV_A0 2

/*
* Register Map
*/
Expand All @@ -99,6 +61,8 @@
#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100)
#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100)

#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000)

#define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x40000)

#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000)
Expand All @@ -119,5 +83,18 @@

#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000)

/*
* Supported devices and revisions.
*/
#define MV88F6281_DEV_ID 0x6281
#define MV88F6281_REV_Z0 0
#define MV88F6281_REV_A0 2

#define MV88F6192_DEV_ID 0x6192
#define MV88F6192_REV_Z0 0
#define MV88F6192_REV_A0 2

#define MV88F6180_DEV_ID 0x6180
#define MV88F6180_REV_A0 2

#endif
3 changes: 1 addition & 2 deletions arch/arm/mach-kirkwood/include/mach/system.h
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Expand Up @@ -9,8 +9,7 @@
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H

#include <mach/hardware.h>
#include <mach/kirkwood.h>
#include <mach/bridge-regs.h>

static inline void arch_idle(void)
{
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1 change: 1 addition & 0 deletions arch/arm/mach-kirkwood/irq.c
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Expand Up @@ -12,6 +12,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <mach/bridge-regs.h>
#include <plat/irq.h>
#include <asm/gpio.h>
#include "common.h"
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1 change: 1 addition & 0 deletions arch/arm/mach-loki/addr-map.c
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Expand Up @@ -38,6 +38,7 @@
/*
* CPU Address Decode Windows registers
*/
#define BRIDGE_REG(x) (BRIDGE_VIRT_BASE | (x))
#define CPU_WIN_CTRL(n) BRIDGE_REG(0x000 | ((n) << 4))
#define CPU_WIN_BASE(n) BRIDGE_REG(0x004 | ((n) << 4))
#define CPU_WIN_REMAP_LO(n) BRIDGE_REG(0x008 | ((n) << 4))
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33 changes: 33 additions & 0 deletions arch/arm/mach-loki/include/mach/bridge-regs.h
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@@ -0,0 +1,33 @@
/*
* arch/arm/mach-loki/include/mach/bridge-regs.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/

#ifndef __ASM_ARCH_BRIDGE_REGS_H
#define __ASM_ARCH_BRIDGE_REGS_H

#include <mach/loki.h>

#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
#define SOFT_RESET_OUT_EN 0x00000004

#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
#define SOFT_RESET 0x00000001

#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)

#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
#define BRIDGE_INT_TIMER0 0x0002
#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR 0x0004

#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
#define IRQ_CAUSE_OFF 0x0000
#define IRQ_MASK_OFF 0x0004

#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)

#endif
2 changes: 1 addition & 1 deletion arch/arm/mach-loki/include/mach/entry-macro.S
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Expand Up @@ -8,7 +8,7 @@
* warranty of any kind, whether express or implied.
*/

#include <mach/loki.h>
#include <mach/bridge-regs.h>

.macro disable_fiq
.endm
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14 changes: 0 additions & 14 deletions arch/arm/mach-loki/include/mach/loki.h
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Expand Up @@ -58,20 +58,6 @@
#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100)

#define BRIDGE_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x20000)
#define BRIDGE_REG(x) (BRIDGE_VIRT_BASE | (x))
#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
#define SOFT_RESET_OUT_EN 0x00000004
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
#define SOFT_RESET 0x00000001
#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
#define BRIDGE_INT_TIMER0 0x0002
#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR 0x0004
#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
#define IRQ_CAUSE_OFF 0x0000
#define IRQ_MASK_OFF 0x0004
#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)

#define PCIE0_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x30000)

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3 changes: 1 addition & 2 deletions arch/arm/mach-loki/include/mach/system.h
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Expand Up @@ -9,8 +9,7 @@
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H

#include <mach/hardware.h>
#include <mach/loki.h>
#include <mach/bridge-regs.h>

static inline void arch_idle(void)
{
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1 change: 1 addition & 0 deletions arch/arm/mach-loki/irq.c
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Expand Up @@ -12,6 +12,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <mach/bridge-regs.h>
#include <plat/irq.h>
#include "common.h"

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1 change: 1 addition & 0 deletions arch/arm/mach-mv78xx0/common.c
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Expand Up @@ -20,6 +20,7 @@
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <mach/mv78xx0.h>
#include <mach/bridge-regs.h>
#include <plat/cache-feroceon-l2.h>
#include <plat/ehci-orion.h>
#include <plat/orion_nand.h>
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39 changes: 39 additions & 0 deletions arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
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@@ -0,0 +1,39 @@
/*
* arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/

#ifndef __ASM_ARCH_BRIDGE_REGS_H
#define __ASM_ARCH_BRIDGE_REGS_H

#include <mach/mv78xx0.h>

#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104)
#define L2_WRITETHROUGH 0x00020000

#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
#define SOFT_RESET_OUT_EN 0x00000004

#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
#define SOFT_RESET 0x00000001

#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
#define BRIDGE_INT_TIMER0 0x0002
#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR (~0x0004)

#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
#define IRQ_CAUSE_ERR_OFF 0x0000
#define IRQ_CAUSE_LOW_OFF 0x0004
#define IRQ_CAUSE_HIGH_OFF 0x0008
#define IRQ_MASK_ERR_OFF 0x000c
#define IRQ_MASK_LOW_OFF 0x0010
#define IRQ_MASK_HIGH_OFF 0x0014

#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)

#endif
2 changes: 1 addition & 1 deletion arch/arm/mach-mv78xx0/include/mach/entry-macro.S
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Expand Up @@ -8,7 +8,7 @@
* warranty of any kind, whether express or implied.
*/

#include <mach/mv78xx0.h>
#include <mach/bridge-regs.h>

.macro disable_fiq
.endm
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42 changes: 11 additions & 31 deletions arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
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Expand Up @@ -59,37 +59,6 @@
* Core-specific peripheral registers.
*/
#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE)
#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104)
#define L2_WRITETHROUGH 0x00020000
#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
#define SOFT_RESET_OUT_EN 0x00000004
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
#define SOFT_RESET 0x00000001
#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
#define BRIDGE_INT_TIMER0 0x0002
#define BRIDGE_INT_TIMER1 0x0004
#define BRIDGE_INT_TIMER1_CLR (~0x0004)
#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
#define IRQ_CAUSE_ERR_OFF 0x0000
#define IRQ_CAUSE_LOW_OFF 0x0004
#define IRQ_CAUSE_HIGH_OFF 0x0008
#define IRQ_MASK_ERR_OFF 0x000c
#define IRQ_MASK_LOW_OFF 0x0010
#define IRQ_MASK_HIGH_OFF 0x0014
#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)

/*
* Supported devices and revisions.
*/
#define MV78X00_Z0_DEV_ID 0x6381
#define MV78X00_REV_Z0 1

#define MV78100_DEV_ID 0x7810
#define MV78100_REV_A0 1

#define MV78200_DEV_ID 0x7820
#define MV78200_REV_A0 1

/*
* Register Map
Expand Down Expand Up @@ -135,5 +104,16 @@

#define SATA_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0xa0000)

/*
* Supported devices and revisions.
*/
#define MV78X00_Z0_DEV_ID 0x6381
#define MV78X00_REV_Z0 1

#define MV78100_DEV_ID 0x7810
#define MV78100_REV_A0 1

#define MV78200_DEV_ID 0x7820
#define MV78200_REV_A0 1

#endif
3 changes: 1 addition & 2 deletions arch/arm/mach-mv78xx0/include/mach/system.h
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Expand Up @@ -9,8 +9,7 @@
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H

#include <mach/hardware.h>
#include <mach/mv78xx0.h>
#include <mach/bridge-regs.h>

static inline void arch_idle(void)
{
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