Skip to content

Commit

Permalink
[MIPS] Ocelot G: Fix build error and numerous warnings.
Browse files Browse the repository at this point in the history
The cause of the build errors was a 64-bit kernel being configured in
ocelot_g_defconfig without the code being 64-bit proof.  Fixed for now
by limiting 64-bit selection to SYS_SUPPORTS_64BIT_KERNEL if BROKEN.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
  • Loading branch information
Ralf Baechle committed Oct 30, 2006
1 parent c39c30d commit 6ceb6d3
Show file tree
Hide file tree
Showing 3 changed files with 9 additions and 4 deletions.
2 changes: 1 addition & 1 deletion arch/mips/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -408,7 +408,7 @@ config MOMENCO_OCELOT_C
select SWAP_IO_SPACE
select SYS_HAS_CPU_RM7000
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
select SYS_SUPPORTS_BIG_ENDIAN
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
Expand Down
6 changes: 3 additions & 3 deletions arch/mips/momentum/ocelot_g/ocelot_pld.h
Original file line number Diff line number Diff line change
Expand Up @@ -23,8 +23,8 @@
#define OCELOT_REG_INTSET (12)
#define OCELOT_REG_INTCLR (13)

#define OCELOT_PLD_WRITE(x, y) writeb(x, OCELOT_CS0_ADDR + OCELOT_REG_##y)
#define OCELOT_PLD_READ(x) readb(OCELOT_CS0_ADDR + OCELOT_REG_##x)

#define __PLD_REG_TO_ADDR(reg) ((void *) OCELOT_CS0_ADDR + OCELOT_REG_##reg)
#define OCELOT_PLD_WRITE(x, reg) writeb(x, __PLD_REG_TO_ADDR(reg))
#define OCELOT_PLD_READ(reg) readb(__PLD_REG_TO_ADDR(reg))

#endif /* __MOMENCO_OCELOT_PLD_H__ */
5 changes: 5 additions & 0 deletions arch/mips/momentum/ocelot_g/setup.c
Original file line number Diff line number Diff line change
Expand Up @@ -57,6 +57,7 @@
#include <asm/gt64240.h>
#include <asm/irq.h>
#include <asm/pci.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/reboot.h>
#include <linux/bootmem.h>
Expand Down Expand Up @@ -160,6 +161,10 @@ static void __init setup_l3cache(unsigned long size)
printk("Done\n");
}

void __init plat_timer_setup(struct irqaction *irq)
{
}

void __init plat_mem_setup(void)
{
void (*l3func)(unsigned long) = (void *) KSEG1ADDR(setup_l3cache);
Expand Down

0 comments on commit 6ceb6d3

Please sign in to comment.