---

yaml
---
r: 27769
b: refs/heads/master
c: 552d920
h: refs/heads/master
i:
  27767: 31c4e50
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 4f678a58d335291ce9213c049bbe16e6d24487ed
+refs/heads/master: 552d9205186428a1e2a49ed577bcbba9f777af37

trunk/drivers/mtd/nand/au1550nd.c

@@ -345,6 +345,7 @@ int __init au1xxx_nand_init(void)
 
 	/* Link the private data with the MTD structure */
 	au1550_mtd->priv = this;
+	au1550_mtd->owner = THIS_MODULE;
 
 	/* disable interrupts */
 	au_writel(au_readl(MEM_STNDCTL) & ~(1 << 8), MEM_STNDCTL);

trunk/drivers/mtd/nand/autcpu12.c

@@ -154,6 +154,7 @@ int __init autcpu12_init(void)
 
 	/* Link the private data with the MTD structure */
 	autcpu12_mtd->priv = this;
+	autcpu12_mtd->owner = THIS_MODULE;
 
 	/* Set address of NAND IO lines */
 	this->IO_ADDR_R = autcpu12_fio_base;

trunk/drivers/mtd/nand/cs553x_nand.c

@@ -223,6 +223,7 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
 
 	/* Link the private data with the MTD structure */
 	new_mtd->priv = this;
+	new_mtd->owner = THIS_MODULE;
 
 	/* map physical address */
 	this->IO_ADDR_R = this->IO_ADDR_W = ioremap(adr, 4096);
@@ -255,7 +256,6 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
 		goto out_ior;
 	}
 
-	new_mtd->owner = THIS_MODULE;
 	cs553x_mtd[cs] = new_mtd;
 	goto out;
 

trunk/drivers/mtd/nand/edb7312.c

@@ -148,6 +148,7 @@ static int __init ep7312_init(void)
 
 	/* Link the private data with the MTD structure */
 	ep7312_mtd->priv = this;
+	ep7312_mtd->owner = THIS_MODULE;
 
 	/*
 	 * Set GPIO Port B control register so that the pins are configured

trunk/drivers/mtd/nand/h1910.c

@@ -135,6 +135,7 @@ static int __init h1910_init(void)
 
 	/* Link the private data with the MTD structure */
 	h1910_nand_mtd->priv = this;
+	h1910_nand_mtd->owner = THIS_MODULE;
 
 	/*
 	 * Enable VPEN

trunk/drivers/mtd/nand/nand_base.c

@@ -69,6 +69,7 @@
  *
  */
 
+#include <linux/module.h>
 #include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/sched.h>
@@ -2316,18 +2317,29 @@ static void nand_resume(struct mtd_info *mtd)
  * @mtd:	MTD device structure
  * @maxchips:	Number of chips to scan for
  *
- * This fills out all the not initialized function pointers
+ * This fills out all the uninitialized function pointers
  * with the defaults.
  * The flash ID is read and the mtd/chip structures are
  * filled with the appropriate values. Buffers are allocated if
  * they are not provided by the board driver
+ * The mtd->owner field must be set to the module of the caller
  *
  */
 int nand_scan(struct mtd_info *mtd, int maxchips)
 {
 	int i, nand_maf_id, nand_dev_id, busw, maf_id;
 	struct nand_chip *this = mtd->priv;
 
+	/* module_text_address() isn't exported. But if _this_ is a module,
+	   it's a fairly safe bet that its caller is a module too... and
+	   that means the call to module_text_address() gets optimised out
+	   without having to resort to ifdefs */
+	if (!mtd->owner && (THIS_MODULE ||
+	    module_text_address((unsigned long)__builtin_return_address(0)))) {
+		printk(KERN_CRIT "nand_scan() called with NULL mtd->owner!\n");
+		BUG();
+	}
+
 	/* Get buswidth to select the correct functions */
 	busw = this->options & NAND_BUSWIDTH_16;
 
@@ -2676,8 +2688,6 @@ int nand_scan(struct mtd_info *mtd, int maxchips)
 	/* and make the autooob the default one */
 	memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
 
-	mtd->owner = THIS_MODULE;
-
 	/* Check, if we should skip the bad block table scan */
 	if (this->options & NAND_SKIP_BBTSCAN)
 		return 0;

trunk/drivers/mtd/nand/nandsim.c

@@ -1546,6 +1546,8 @@ static int __init ns_init_module(void)
 		chip->options |= NAND_BUSWIDTH_16;
 	}
 
+	nsmtd->owner = THIS_MODULE;
+
 	if ((retval = nand_scan(nsmtd, 1)) != 0) {
 		NS_ERR("can't register NAND Simulator\n");
 		if (retval > 0)

trunk/drivers/mtd/nand/ppchameleonevb.c

@@ -221,6 +221,7 @@ static int __init ppchameleonevb_init(void)
 
 	/* Link the private data with the MTD structure */
 	ppchameleon_mtd->priv = this;
+	ppchameleon_mtd->owner = THIS_MODULE;
 
 	/* Initialize GPIOs */
 	/* Pin mapping for NAND chip */

trunk/drivers/mtd/nand/rtc_from4.c

@@ -538,6 +538,7 @@ int __init rtc_from4_init(void)
 
 	/* Link the private data with the MTD structure */
 	rtc_from4_mtd->priv = this;
+	rtc_from4_mtd->owner = THIS_MODULE;
 
 	/* set area 5 as PCMCIA mode to clear the spec of tDH(Data hold time;9ns min) */
 	bcr1 = *SH77X9_BCR1 & ~0x0002;

trunk/drivers/mtd/nand/s3c2410.c

@@ -516,6 +516,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
 
 	nmtd->info	   = info;
 	nmtd->mtd.priv	   = chip;
+	nmtd->mtd.owner    = THIS_MODULE;
 	nmtd->set	   = set;
 
 	if (hardware_ecc) {

trunk/drivers/mtd/nand/sharpsl.c

@@ -185,6 +185,7 @@ int __init sharpsl_nand_init(void)
 
 	/* Link the private data with the MTD structure */
 	sharpsl_mtd->priv = this;
+	sharpsl_mtd->owner = THIS_MODULE;
 
 	/*
 	 * PXA initialize

trunk/drivers/mtd/nand/spia.c

@@ -121,6 +121,7 @@ int __init spia_init(void)
 
 	/* Link the private data with the MTD structure */
 	spia_mtd->priv = this;
+	spia_mtd->owner = THIS_MODULE;
 
 	/*
 	 * Set GPIO Port E control register so that the pins are configured

trunk/drivers/mtd/nand/toto.c

@@ -137,6 +137,7 @@ int __init toto_init(void)
 
 	/* Link the private data with the MTD structure */
 	toto_mtd->priv = this;
+	toto_mtd->owner = THIS_MODULE;
 
 	/* Set address of NAND IO lines */
 	this->IO_ADDR_R = toto_io_base;

trunk/drivers/mtd/nand/ts7250.c

@@ -147,6 +147,7 @@ static int __init ts7250_init(void)
 
 	/* Link the private data with the MTD structure */
 	ts7250_mtd->priv = this;
+	ts7250_mtd->owner = THIS_MODULE;
 
 	/* insert callbacks */
 	this->IO_ADDR_R = (void *)TS72XX_NAND_DATA_VIRT_BASE;