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yaml
---
r: 247855
b: refs/heads/master
c: bea02e4
h: refs/heads/master
i:
  247853: 59edac6
  247851: de49e2d
  247847: 01d98e1
  247839: fdb1ebb
v: v3
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Florian Tobias Schandinat authored and Florian Tobias Schandinat committed Mar 26, 2011
1 parent 9efe691 commit 6e42441
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Showing 4 changed files with 56 additions and 1 deletion.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: b692a63af8b63a7a7e84702a713d0072e336b326
refs/heads/master: bea02e45874a5d18127b0779740c4fd5b3e7e44a
1 change: 1 addition & 0 deletions trunk/drivers/video/via/hw.c
Original file line number Diff line number Diff line change
Expand Up @@ -2289,6 +2289,7 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
get_sync(viafbinfo1));
}

clock.set_engine_pll_state(VIA_STATE_ON);
clock.set_primary_clock_source(VIA_CLKSRC_X1, true);
clock.set_secondary_clock_source(VIA_CLKSRC_X1, true);

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51 changes: 51 additions & 0 deletions trunk/drivers/video/via/via_clock.c
Original file line number Diff line number Diff line change
Expand Up @@ -87,6 +87,15 @@ static inline void k800_set_secondary_pll_encoded(u32 data)
via_write_reg_mask(VIASR, 0x40, 0x00, 0x04); /* disable reset */
}

static inline void set_engine_pll_encoded(u32 data)
{
via_write_reg_mask(VIASR, 0x40, 0x01, 0x01); /* enable reset */
via_write_reg(VIASR, 0x47, data & 0xFF);
via_write_reg(VIASR, 0x48, (data >> 8) & 0xFF);
via_write_reg(VIASR, 0x49, (data >> 16) & 0xFF);
via_write_reg_mask(VIASR, 0x40, 0x00, 0x01); /* disable reset */
}

static void cle266_set_primary_pll(struct via_pll_config config)
{
cle266_set_primary_pll_encoded(cle266_encode_pll(config));
Expand Down Expand Up @@ -117,6 +126,16 @@ static void vx855_set_secondary_pll(struct via_pll_config config)
k800_set_secondary_pll_encoded(vx855_encode_pll(config));
}

static void k800_set_engine_pll(struct via_pll_config config)
{
set_engine_pll_encoded(k800_encode_pll(config));
}

static void vx855_set_engine_pll(struct via_pll_config config)
{
set_engine_pll_encoded(vx855_encode_pll(config));
}

static void set_primary_pll_state(u8 state)
{
u8 value;
Expand Down Expand Up @@ -153,6 +172,24 @@ static void set_secondary_pll_state(u8 state)
via_write_reg_mask(VIASR, 0x2D, value, 0x0C);
}

static void set_engine_pll_state(u8 state)
{
u8 value;

switch (state) {
case VIA_STATE_ON:
value = 0x02;
break;
case VIA_STATE_OFF:
value = 0x00;
break;
default:
return;
}

via_write_reg_mask(VIASR, 0x2D, value, 0x03);
}

static void set_primary_clock_state(u8 state)
{
u8 value;
Expand Down Expand Up @@ -247,6 +284,11 @@ static void dummy_set_pll_state(u8 state)
printk(KERN_INFO "Using undocumented set PLL state.\n%s", via_slap);
}

static void dummy_set_pll(struct via_pll_config config)
{
printk(KERN_INFO "Using undocumented set PLL.\n%s", via_slap);
}

void via_clock_init(struct via_clock *clock, int gfx_chip)
{
switch (gfx_chip) {
Expand All @@ -261,6 +303,9 @@ void via_clock_init(struct via_clock *clock, int gfx_chip)
clock->set_secondary_clock_source = dummy_set_clock_source;
clock->set_secondary_pll_state = dummy_set_pll_state;
clock->set_secondary_pll = cle266_set_secondary_pll;

clock->set_engine_pll_state = dummy_set_pll_state;
clock->set_engine_pll = dummy_set_pll;
break;
case UNICHROME_K800:
case UNICHROME_PM800:
Expand All @@ -280,6 +325,9 @@ void via_clock_init(struct via_clock *clock, int gfx_chip)
clock->set_secondary_clock_source = set_secondary_clock_source;
clock->set_secondary_pll_state = set_secondary_pll_state;
clock->set_secondary_pll = k800_set_secondary_pll;

clock->set_engine_pll_state = set_engine_pll_state;
clock->set_engine_pll = k800_set_engine_pll;
break;
case UNICHROME_VX855:
case UNICHROME_VX900:
Expand All @@ -292,6 +340,9 @@ void via_clock_init(struct via_clock *clock, int gfx_chip)
clock->set_secondary_clock_source = set_secondary_clock_source;
clock->set_secondary_pll_state = set_secondary_pll_state;
clock->set_secondary_pll = vx855_set_secondary_pll;

clock->set_engine_pll_state = set_engine_pll_state;
clock->set_engine_pll = vx855_set_engine_pll;
break;

}
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3 changes: 3 additions & 0 deletions trunk/drivers/video/via/via_clock.h
Original file line number Diff line number Diff line change
Expand Up @@ -53,6 +53,9 @@ struct via_clock {
void (*set_secondary_clock_source)(enum via_clksrc src, bool use_pll);
void (*set_secondary_pll_state)(u8 state);
void (*set_secondary_pll)(struct via_pll_config config);

void (*set_engine_pll_state)(u8 state);
void (*set_engine_pll)(struct via_pll_config config);
};


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