Skip to content

Commit

Permalink
---
Browse files Browse the repository at this point in the history
yaml
---
r: 160923
b: refs/heads/master
c: d6fc87d
h: refs/heads/master
i:
  160921: 388dea1
  160919: 2c14694
v: v3
  • Loading branch information
Ben Dooks authored and Ben Dooks committed Jul 30, 2009
1 parent 6e7cdf5 commit 6f18ce7
Show file tree
Hide file tree
Showing 3 changed files with 26 additions and 21 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: ea5fe9aedf512d20b75b7dcfd54ab99ae5c0934b
refs/heads/master: d6fc87d3f7d236892e4d0003a07cd2b5171e5e27
20 changes: 0 additions & 20 deletions trunk/arch/arm/plat-s3c/include/plat/cpu-freq.h
Original file line number Diff line number Diff line change
Expand Up @@ -97,26 +97,6 @@ struct s3c_pllval {
unsigned long pll_reg;
};

/**
* struct s3c_cpufreq_config - current cpu frequency configuration
* @freq: The current settings for the core clocks.
* @pll: The PLL table entry for the current PLL settings.
* @divs: The divisor settings for the core clocks.
* @info: The current core driver information.
* @board: The information for the board we are running on.
*
* This is for the core drivers that need to know information about
* the current settings and values. It should not be needed by any
* device drivers.
*/
struct s3c_cpufreq_config {
struct s3c_freq freq;
struct s3c_pllval pll;
struct s3c_clkdivs divs;
struct s3c_cpufreq_info *info; /* for core, not drivers */
struct s3c_cpufreq_board *board;
};

/**
* struct s3c_cpufreq_board - per-board cpu frequency informatin
* @refresh: The SDRAM refresh period in nanoseconds.
Expand Down
25 changes: 25 additions & 0 deletions trunk/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
Original file line number Diff line number Diff line change
Expand Up @@ -64,6 +64,31 @@ struct s3c_plltab {
int size;
};

/**
* struct s3c_cpufreq_config - current cpu frequency configuration
* @freq: The current settings for the core clocks.
* @max: Maxium settings, derived from core, board and user settings.
* @pll: The PLL table entry for the current PLL settings.
* @divs: The divisor settings for the core clocks.
* @info: The current core driver information.
* @board: The information for the board we are running on.
* @lock_pll: Set if the PLL settings cannot be changed.
*
* This is for the core drivers that need to know information about
* the current settings and values. It should not be needed by any
* device drivers.
*/
struct s3c_cpufreq_config {
struct s3c_freq freq;
struct s3c_freq max;
struct cpufreq_frequency_table pll;
struct s3c_clkdivs divs;
struct s3c_cpufreq_info *info; /* for core, not drivers */
struct s3c_cpufreq_board *board;

unsigned int lock_pll:1;
};

/**
* struct s3c_cpufreq_info - Information for the CPU frequency driver.
* @name: The name of this implementation.
Expand Down

0 comments on commit 6f18ce7

Please sign in to comment.