Skip to content

Commit

Permalink
---
Browse files Browse the repository at this point in the history
yaml
---
r: 291612
b: refs/heads/master
c: 8f4a0a3
h: refs/heads/master
v: v3
  • Loading branch information
Alexander Duyck authored and David S. Miller committed Mar 19, 2012
1 parent 8792833 commit 6f495c6
Show file tree
Hide file tree
Showing 2 changed files with 9 additions and 2 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: da24e906cbfc08171d24a2b7cf66fad565fdd121
refs/heads/master: 8f4a0a3d9f9706da5a9d053fe39854c160250ddc
9 changes: 8 additions & 1 deletion trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
Original file line number Diff line number Diff line change
Expand Up @@ -2011,13 +2011,20 @@ s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw, s32 packetbuf_num)
IXGBE_WRITE_REG(hw, IXGBE_MFLCN, mflcn_reg);
IXGBE_WRITE_REG(hw, IXGBE_FCCFG, fccfg_reg);

fcrth = hw->fc.high_water[packetbuf_num] << 10;
fcrtl = hw->fc.low_water << 10;

if (hw->fc.current_mode & ixgbe_fc_tx_pause) {
fcrth = hw->fc.high_water[packetbuf_num] << 10;
fcrth |= IXGBE_FCRTH_FCEN;
if (hw->fc.send_xon)
fcrtl |= IXGBE_FCRTL_XONE;
} else {
/*
* If Tx flow control is disabled, set our high water mark
* to Rx FIFO size minus 32 in order prevent Tx switch
* loopback from stalling on DMA.
*/
fcrth = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(packetbuf_num)) - 32;
}

IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(packetbuf_num), fcrth);
Expand Down

0 comments on commit 6f495c6

Please sign in to comment.