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natsemi: fix MMIO for PPC 44x platforms
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The driver stores the PCI resource address into 'unsigned long' variable before
calling ioremap()  on it. This warrants a kernel oops when the registers are
accessed on PPC 44x platforms which (being 32-bit) have PCI memory space mapped
beyond 4 GB.

The arch/ppc/ kernel has a fixup in ioremap() that creates an illusion of the
PCI memory resources are mapped below 4 GB, but arch/powerpc/ code got rid of
this trick, having instead CONFIG_RESOURCES_64BIT enabled.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Sergei Shtylyov authored and Jeff Garzik committed Apr 17, 2008
1 parent 406874a commit 703bb99
Showing 1 changed file with 6 additions and 4 deletions.
10 changes: 6 additions & 4 deletions drivers/net/natsemi.c
Original file line number Diff line number Diff line change
Expand Up @@ -786,7 +786,8 @@ static int __devinit natsemi_probe1 (struct pci_dev *pdev,
struct netdev_private *np;
int i, option, irq, chip_idx = ent->driver_data;
static int find_cnt = -1;
unsigned long iostart, iosize;
resource_size_t iostart;
unsigned long iosize;
void __iomem *ioaddr;
const int pcibar = 1; /* PCI base address register */
int prev_eedata;
Expand Down Expand Up @@ -946,10 +947,11 @@ static int __devinit natsemi_probe1 (struct pci_dev *pdev,
goto err_create_file;

if (netif_msg_drv(np)) {
printk(KERN_INFO "natsemi %s: %s at %#08lx "
printk(KERN_INFO "natsemi %s: %s at %#08llx "
"(%s), %s, IRQ %d",
dev->name, natsemi_pci_info[chip_idx].name, iostart,
pci_name(np->pci_dev), print_mac(mac, dev->dev_addr), irq);
dev->name, natsemi_pci_info[chip_idx].name,
(unsigned long long)iostart, pci_name(np->pci_dev),
print_mac(mac, dev->dev_addr), irq);
if (dev->if_port == PORT_TP)
printk(", port TP.\n");
else if (np->ignore_phy)
Expand Down

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