---

yaml
---
r: 208431
b: refs/heads/master
c: 27151dc
h: refs/heads/master
i:
  208429: 0db66e3
  208427: a6103c0
  208423: b98ba71
  208415: dffa01d
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: fc8a0985c2846292312556cba10b8a4182f55967
+refs/heads/master: 27151dc9e363c0033d7375863c0d284f8c4b636a

trunk/drivers/mmc/host/omap_hsmmc.c

@@ -2096,10 +2096,23 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev)
 	mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
 		     MMC_CAP_WAIT_WHILE_BUSY;
 
-	if (mmc_slot(host).wires >= 8)
+	switch (mmc_slot(host).wires) {
+	case 8:
 		mmc->caps |= MMC_CAP_8_BIT_DATA;
-	else if (mmc_slot(host).wires >= 4)
+		/* Fall through */
+	case 4:
 		mmc->caps |= MMC_CAP_4_BIT_DATA;
+		break;
+	case 1:
+		/* Nothing to crib here */
+	case 0:
+		/* Assuming nothing was given by board, Core use's 1-Bit */
+		break;
+	default:
+		/* Completely unexpected.. Core goes with 1-Bit Width */
+		dev_crit(mmc_dev(host->mmc), "Invalid width %d\n used!"
+			"using 1 instead\n", mmc_slot(host).wires);
+	}
 
 	if (mmc_slot(host).nonremovable)
 		mmc->caps |= MMC_CAP_NONREMOVABLE;