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[POWERPC] Convert remaining dts-v0 files to v1
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At the moment we have a mixture of left-over version 0 and new-format
version 1 files in arch/powerpc/boot/dts.  This is potentially
confusing to people new to the dts format attempting to figure it out.

So, this patch converts all the as-yet unconverted dts v0 files and
converts them to v1.  They're mechanically-converted, and not hand
tweaked so in some cases they're not 100% in keeping with usual v1
style, but the convertor program does have some heuristics so the
discrepancies aren't too bad.

I have checked that this patch produces no changes to the resulting
dtb binaries.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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David Gibson authored and Josh Boyer committed May 29, 2008
1 parent b786af1 commit 71f3497
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Showing 17 changed files with 1,344 additions and 1,310 deletions.
142 changes: 72 additions & 70 deletions arch/powerpc/boot/dts/bamboo.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -11,12 +11,14 @@
* any warranty of any kind, whether express or implied.
*/

/dts-v1/;

/ {
#address-cells = <2>;
#size-cells = <1>;
model = "amcc,bamboo";
compatible = "amcc,bamboo";
dcr-parent = <&/cpus/cpu@0>;
dcr-parent = <&{/cpus/cpu@0}>;

aliases {
ethernet0 = &EMAC0;
Expand All @@ -34,28 +36,28 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,440EP";
reg = <0>;
reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
i-cache-line-size = <20>;
d-cache-line-size = <20>;
i-cache-size = <8000>;
d-cache-size = <8000>;
i-cache-line-size = <32>;
d-cache-line-size = <32>;
i-cache-size = <32768>;
d-cache-size = <32768>;
dcr-controller;
dcr-access-method = "native";
};
};

memory {
device_type = "memory";
reg = <0 0 0>; /* Filled in by zImage */
reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
};

UIC0: interrupt-controller0 {
compatible = "ibm,uic-440ep","ibm,uic";
interrupt-controller;
cell-index = <0>;
dcr-reg = <0c0 009>;
dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
Expand All @@ -65,22 +67,22 @@
compatible = "ibm,uic-440ep","ibm,uic";
interrupt-controller;
cell-index = <1>;
dcr-reg = <0d0 009>;
dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <1e 4 1f 4>; /* cascade */
interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};

SDR0: sdr {
compatible = "ibm,sdr-440ep";
dcr-reg = <00e 002>;
dcr-reg = <0x00e 0x002>;
};

CPR0: cpr {
compatible = "ibm,cpr-440ep";
dcr-reg = <00c 002>;
dcr-reg = <0x00c 0x002>;
};

plb {
Expand All @@ -92,29 +94,29 @@

SDRAM0: sdram {
compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
dcr-reg = <010 2>;
dcr-reg = <0x010 0x002>;
};

DMA0: dma {
compatible = "ibm,dma-440ep", "ibm,dma-440gp";
dcr-reg = <100 027>;
dcr-reg = <0x100 0x027>;
};

MAL0: mcmal {
compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
dcr-reg = <180 62>;
dcr-reg = <0x180 0x062>;
num-tx-chans = <4>;
num-rx-chans = <2>;
interrupt-parent = <&MAL0>;
interrupts = <0 1 2 3 4>;
interrupts = <0x0 0x1 0x2 0x3 0x4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
/*RXEOB*/ 1 &UIC0 b 4
/*SERR*/ 2 &UIC1 0 4
/*TXDE*/ 3 &UIC1 1 4
/*RXDE*/ 4 &UIC1 2 4>;
interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
/*RXEOB*/ 0x1 &UIC0 0xb 0x4
/*SERR*/ 0x2 &UIC1 0x0 0x4
/*TXDE*/ 0x3 &UIC1 0x1 0x4
/*RXDE*/ 0x4 &UIC1 0x2 0x4>;
};

POB0: opb {
Expand All @@ -124,101 +126,101 @@
/* Bamboo is oddball in the 44x world and doesn't use the ERPN
* bits.
*/
ranges = <00000000 0 00000000 80000000
80000000 0 80000000 80000000>;
ranges = <0x00000000 0x00000000 0x00000000 0x80000000
0x80000000 0x00000000 0x80000000 0x80000000>;
interrupt-parent = <&UIC1>;
interrupts = <7 4>;
interrupts = <0x7 0x4>;
clock-frequency = <0>; /* Filled in by zImage */

EBC0: ebc {
compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
dcr-reg = <012 2>;
dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by zImage */
interrupts = <5 1>;
interrupts = <0x5 0x1>;
interrupt-parent = <&UIC1>;
};

UART0: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
reg = <ef600300 8>;
virtual-reg = <ef600300>;
reg = <0xef600300 0x00000008>;
virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by zImage */
current-speed = <1c200>;
current-speed = <115200>;
interrupt-parent = <&UIC0>;
interrupts = <0 4>;
interrupts = <0x0 0x4>;
};

UART1: serial@ef600400 {
device_type = "serial";
compatible = "ns16550";
reg = <ef600400 8>;
virtual-reg = <ef600400>;
reg = <0xef600400 0x00000008>;
virtual-reg = <0xef600400>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC0>;
interrupts = <1 4>;
interrupts = <0x1 0x4>;
};

UART2: serial@ef600500 {
device_type = "serial";
compatible = "ns16550";
reg = <ef600500 8>;
virtual-reg = <ef600500>;
reg = <0xef600500 0x00000008>;
virtual-reg = <0xef600500>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC0>;
interrupts = <3 4>;
interrupts = <0x3 0x4>;
};

UART3: serial@ef600600 {
device_type = "serial";
compatible = "ns16550";
reg = <ef600600 8>;
virtual-reg = <ef600600>;
reg = <0xef600600 0x00000008>;
virtual-reg = <0xef600600>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC0>;
interrupts = <4 4>;
interrupts = <0x4 0x4>;
};

IIC0: i2c@ef600700 {
compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
reg = <ef600700 14>;
reg = <0xef600700 0x00000014>;
interrupt-parent = <&UIC0>;
interrupts = <2 4>;
interrupts = <0x2 0x4>;
};

IIC1: i2c@ef600800 {
compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
reg = <ef600800 14>;
reg = <0xef600800 0x00000014>;
interrupt-parent = <&UIC0>;
interrupts = <7 4>;
interrupts = <0x7 0x4>;
};

ZMII0: emac-zmii@ef600d00 {
compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
reg = <ef600d00 c>;
reg = <0xef600d00 0x0000000c>;
};

EMAC0: ethernet@ef600e00 {
device_type = "network";
compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
interrupts = <1c 4 1d 4>;
reg = <ef600e00 70>;
interrupts = <0x1c 0x4 0x1d 0x4>;
reg = <0xef600e00 0x00000070>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
mal-tx-channel = <0 1>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <5dc>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
max-frame-size = <1500>;
rx-fifo-size = <4096>;
tx-fifo-size = <2048>;
phy-mode = "rmii";
phy-map = <00000000>;
phy-map = <0x00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <0>;
};
Expand All @@ -227,26 +229,26 @@
device_type = "network";
compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
interrupts = <1e 4 1f 4>;
reg = <ef600f00 70>;
interrupts = <0x1e 0x4 0x1f 0x4>;
reg = <0xef600f00 0x00000070>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
mal-tx-channel = <2 3>;
mal-rx-channel = <1>;
cell-index = <1>;
max-frame-size = <5dc>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
max-frame-size = <1500>;
rx-fifo-size = <4096>;
tx-fifo-size = <2048>;
phy-mode = "rmii";
phy-map = <00000000>;
phy-map = <0x00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <1>;
};

usb@ef601000 {
compatible = "ohci-be";
reg = <ef601000 80>;
interrupts = <8 1 9 1>;
reg = <0xef601000 0x00000080>;
interrupts = <0x8 0x1 0x9 0x1>;
interrupt-parent = < &UIC1 >;
};
};
Expand All @@ -258,35 +260,35 @@
#address-cells = <3>;
compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
primary;
reg = <0 eec00000 8 /* Config space access */
0 eed00000 4 /* IACK */
0 eed00000 4 /* Special cycle */
0 ef400000 40>; /* Internal registers */
reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */
0x00000000 0xeed00000 0x00000004 /* IACK */
0x00000000 0xeed00000 0x00000004 /* Special cycle */
0x00000000 0xef400000 0x00000040>; /* Internal registers */

/* Outbound ranges, one memory and one IO,
* later cannot be changed. Chip supports a second
* IO range but we don't use it for now
*/
ranges = <02000000 0 a0000000 0 a0000000 0 20000000
01000000 0 00000000 0 e8000000 0 00010000>;
ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;

/* Inbound 2GB range starting at 0 */
dma-ranges = <42000000 0 0 0 0 0 80000000>;
dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;

/* Bamboo has all 4 IRQ pins tied together per slot */
interrupt-map-mask = <f800 0 0 0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
interrupt-map = <
/* IDSEL 1 */
0800 0 0 0 &UIC0 1c 8
0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8

/* IDSEL 2 */
1000 0 0 0 &UIC0 1b 8
0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8

/* IDSEL 3 */
1800 0 0 0 &UIC0 1a 8
0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8

/* IDSEL 4 */
2000 0 0 0 &UIC0 19 8
0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8
>;
};
};
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