drm/nouveau: restore fifo chid information in engine error messages

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
git-mirror · Oct 3, 2012 · 72a1482 · 72a1482
1 parent 4c2d422
commit 72a1482
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Showing 15 changed files with 213 additions and 132 deletions.
diff --git a/drivers/gpu/drm/nouveau/core/core/engctx.c b/drivers/gpu/drm/nouveau/core/core/engctx.c
@@ -59,7 +59,6 @@ nouveau_engctx_create_(struct nouveau_object *parent,
 {
 	struct nouveau_client *client = nouveau_client(parent);
 	struct nouveau_engine *engine = nv_engine(engobj);
-	struct nouveau_subdev *subdev = nv_subdev(engine);
 	struct nouveau_object *engctx;
 	unsigned long save;
 	int ret;
@@ -210,58 +209,28 @@ _nouveau_engctx_fini(struct nouveau_object *object, bool suspend)
 }
 
 struct nouveau_object *
-nouveau_engctx_lookup(struct nouveau_engine *engine, u64 addr)
+nouveau_engctx_get(struct nouveau_engine *engine, u64 addr)
 {
 	struct nouveau_engctx *engctx;
+	unsigned long flags;
 
+	spin_lock_irqsave(&engine->lock, flags);
 	list_for_each_entry(engctx, &engine->contexts, head) {
-		if (engctx->base.size &&
-		    nv_gpuobj(engctx)->addr == addr)
+		if (engctx->addr == addr) {
+			engctx->save = flags;
 			return nv_object(engctx);
+		}
 	}
-
-	return NULL;
-}
-
-struct nouveau_handle *
-nouveau_engctx_lookup_class(struct nouveau_engine *engine, u64 addr, u16 oclass)
-{
-	struct nouveau_object *engctx = nouveau_engctx_lookup(engine, addr);
-	struct nouveau_namedb *namedb;
-
-	if (engctx && (namedb = (void *)nv_pclass(engctx, NV_NAMEDB_CLASS)))
-		return nouveau_namedb_get_class(namedb, oclass);
-
-	return NULL;
-}
-
-struct nouveau_handle *
-nouveau_engctx_lookup_vinst(struct nouveau_engine *engine, u64 addr, u64 vinst)
-{
-	struct nouveau_object *engctx = nouveau_engctx_lookup(engine, addr);
-	struct nouveau_namedb *namedb;
-
-	if (engctx && (namedb = (void *)nv_pclass(engctx, NV_NAMEDB_CLASS)))
-		return nouveau_namedb_get_vinst(namedb, vinst);
-
-	return NULL;
-}
-
-struct nouveau_handle *
-nouveau_engctx_lookup_cinst(struct nouveau_engine *engine, u64 addr, u32 cinst)
-{
-	struct nouveau_object *engctx = nouveau_engctx_lookup(engine, addr);
-	struct nouveau_namedb *namedb;
-
-	if (engctx && (namedb = (void *)nv_pclass(engctx, NV_NAMEDB_CLASS)))
-		return nouveau_namedb_get_cinst(namedb, cinst);
-
+	spin_unlock_irqrestore(&engine->lock, flags);
 	return NULL;
 }
 
 void
-nouveau_engctx_handle_put(struct nouveau_handle *handle)
+nouveau_engctx_put(struct nouveau_object *object)
 {
-	if (handle)
-		nouveau_namedb_put(handle);
+	if (object) {
+		struct nouveau_engine *engine = nv_engine(object->engine);
+		struct nouveau_engctx *engctx = nv_engctx(object);
+		spin_unlock_irqrestore(&engine->lock, engctx->save);
+	}
 }
diff --git a/drivers/gpu/drm/nouveau/core/core/handle.c b/drivers/gpu/drm/nouveau/core/core/handle.c
@@ -187,3 +187,37 @@ nouveau_handle_ref(struct nouveau_object *parent, u32 name)
 
 	return object;
 }
+
+struct nouveau_handle *
+nouveau_handle_get_class(struct nouveau_object *engctx, u16 oclass)
+{
+	struct nouveau_namedb *namedb;
+	if (engctx && (namedb = (void *)nv_pclass(engctx, NV_NAMEDB_CLASS)))
+		return nouveau_namedb_get_class(namedb, oclass);
+	return NULL;
+}
+
+struct nouveau_handle *
+nouveau_handle_get_vinst(struct nouveau_object *engctx, u64 vinst)
+{
+	struct nouveau_namedb *namedb;
+	if (engctx && (namedb = (void *)nv_pclass(engctx, NV_NAMEDB_CLASS)))
+		return nouveau_namedb_get_vinst(namedb, vinst);
+	return NULL;
+}
+
+struct nouveau_handle *
+nouveau_handle_get_cinst(struct nouveau_object *engctx, u32 cinst)
+{
+	struct nouveau_namedb *namedb;
+	if (engctx && (namedb = (void *)nv_pclass(engctx, NV_NAMEDB_CLASS)))
+		return nouveau_namedb_get_cinst(namedb, cinst);
+	return NULL;
+}
+
+void
+nouveau_handle_put(struct nouveau_handle *handle)
+{
+	if (handle)
+		nouveau_namedb_put(handle);
+}
diff --git a/drivers/gpu/drm/nouveau/core/engine/copy/nva3.c b/drivers/gpu/drm/nouveau/core/engine/copy/nva3.c
@@ -30,6 +30,7 @@
 #include <subdev/fb.h>
 #include <subdev/vm.h>
 
+#include <engine/fifo.h>
 #include <engine/copy.h>
 
 #include "fuc/nva3.fuc.h"
@@ -102,21 +103,28 @@ static struct nouveau_enum nva3_copy_isr_error_name[] = {
 static void
 nva3_copy_intr(struct nouveau_subdev *subdev)
 {
+	struct nouveau_fifo *pfifo = nouveau_fifo(subdev);
+	struct nouveau_engine *engine = nv_engine(subdev);
+	struct nouveau_object *engctx;
 	struct nva3_copy_priv *priv = (void *)subdev;
 	u32 dispatch = nv_rd32(priv, 0x10401c);
 	u32 stat = nv_rd32(priv, 0x104008) & dispatch & ~(dispatch >> 16);
-	u32 inst = nv_rd32(priv, 0x104050) & 0x3fffffff;
+	u64 inst = nv_rd32(priv, 0x104050) & 0x3fffffff;
 	u32 ssta = nv_rd32(priv, 0x104040) & 0x0000ffff;
 	u32 addr = nv_rd32(priv, 0x104040) >> 16;
 	u32 mthd = (addr & 0x07ff) << 2;
 	u32 subc = (addr & 0x3800) >> 11;
 	u32 data = nv_rd32(priv, 0x104044);
+	int chid;
+
+	engctx = nouveau_engctx_get(engine, inst);
+	chid   = pfifo->chid(pfifo, engctx);
 
 	if (stat & 0x00000040) {
 		nv_error(priv, "DISPATCH_ERROR [");
 		nouveau_enum_print(nva3_copy_isr_error_name, ssta);
-		printk("] ch 0x%08x subc %d mthd 0x%04x data 0x%08x\n",
-		       inst, subc, mthd, data);
+		printk("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n",
+		       chid, inst << 12, subc, mthd, data);
 		nv_wr32(priv, 0x104004, 0x00000040);
 		stat &= ~0x00000040;
 	}
@@ -127,6 +135,7 @@ nva3_copy_intr(struct nouveau_subdev *subdev)
 	}
 
 	nv50_fb_trap(nouveau_fb(priv), 1);
+	nouveau_engctx_put(engctx);
 }
 
 static int

diff --git a/drivers/gpu/drm/nouveau/core/engine/copy/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/copy/nvc0.c
@@ -27,6 +27,7 @@
 #include <core/class.h>
 #include <core/engctx.h>
 
+#include <engine/fifo.h>
 #include <engine/copy.h>
 
 #include "fuc/nvc0.fuc.h"
@@ -113,6 +114,9 @@ static struct nouveau_enum nvc0_copy_isr_error_name[] = {
 static void
 nvc0_copy_intr(struct nouveau_subdev *subdev)
 {
+	struct nouveau_fifo *pfifo = nouveau_fifo(subdev);
+	struct nouveau_engine *engine = nv_engine(subdev);
+	struct nouveau_object *engctx;
 	int idx = nv_engidx(nv_object(subdev)) - NVDEV_ENGINE_COPY0;
 	struct nvc0_copy_priv *priv = (void *)subdev;
 	u32 disp = nv_rd32(priv, 0x10401c + (idx * 0x1000));
@@ -124,12 +128,16 @@ nvc0_copy_intr(struct nouveau_subdev *subdev)
 	u32 mthd = (addr & 0x07ff) << 2;
 	u32 subc = (addr & 0x3800) >> 11;
 	u32 data = nv_rd32(priv, 0x104044 + (idx * 0x1000));
+	int chid;
+
+	engctx = nouveau_engctx_get(engine, inst);
+	chid   = pfifo->chid(pfifo, engctx);
 
 	if (stat & 0x00000040) {
 		nv_error(priv, "DISPATCH_ERROR [");
 		nouveau_enum_print(nvc0_copy_isr_error_name, ssta);
-		printk("] ch 0x%010llx subc %d mthd 0x%04x data 0x%08x\n",
-		       (u64)inst << 12, subc, mthd, data);
+		printk("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n",
+		       chid, (u64)inst << 12, subc, mthd, data);
 		nv_wr32(priv, 0x104004 + (idx * 0x1000), 0x00000040);
 		stat &= ~0x00000040;
 	}
@@ -138,6 +146,8 @@ nvc0_copy_intr(struct nouveau_subdev *subdev)
 		nv_error(priv, "unhandled intr 0x%08x\n", stat);
 		nv_wr32(priv, 0x104004 + (idx * 0x1000), stat);
 	}
+
+	nouveau_engctx_put(engctx);
 }
 
 static int

diff --git a/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c b/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
@@ -30,6 +30,7 @@
 
 #include <subdev/fb.h>
 
+#include <engine/fifo.h>
 #include <engine/crypt.h>
 
 struct nv84_crypt_priv {
@@ -133,23 +134,31 @@ static struct nouveau_bitfield nv84_crypt_intr_mask[] = {
 static void
 nv84_crypt_intr(struct nouveau_subdev *subdev)
 {
+	struct nouveau_fifo *pfifo = nouveau_fifo(subdev);
+	struct nouveau_engine *engine = nv_engine(subdev);
+	struct nouveau_object *engctx;
 	struct nv84_crypt_priv *priv = (void *)subdev;
 	u32 stat = nv_rd32(priv, 0x102130);
 	u32 mthd = nv_rd32(priv, 0x102190);
 	u32 data = nv_rd32(priv, 0x102194);
 	u32 inst = nv_rd32(priv, 0x102188) & 0x7fffffff;
+	int chid;
+
+	engctx = nouveau_engctx_get(engine, inst);
+	chid   = pfifo->chid(pfifo, engctx);
 
 	if (stat) {
 		nv_error(priv, "");
 		nouveau_bitfield_print(nv84_crypt_intr_mask, stat);
-		printk(" ch 0x%010llx mthd 0x%04x data 0x%08x\n",
-		       (u64)inst << 12, mthd, data);
+		printk(" ch %d [0x%010llx] mthd 0x%04x data 0x%08x\n",
+		       chid, (u64)inst << 12, mthd, data);
 	}
 
 	nv_wr32(priv, 0x102130, stat);
 	nv_wr32(priv, 0x10200c, 0x10);
 
 	nv50_fb_trap(nouveau_fb(priv), 1);
+	nouveau_engctx_put(engctx);
 }
 
 static int

diff --git a/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c b/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
@@ -30,6 +30,7 @@
 #include <subdev/timer.h>
 #include <subdev/fb.h>
 
+#include <engine/fifo.h>
 #include <engine/crypt.h>
 
 #include "fuc/nv98.fuc.h"
@@ -102,6 +103,9 @@ static struct nouveau_enum nv98_crypt_isr_error_name[] = {
 static void
 nv98_crypt_intr(struct nouveau_subdev *subdev)
 {
+	struct nouveau_fifo *pfifo = nouveau_fifo(subdev);
+	struct nouveau_engine *engine = nv_engine(subdev);
+	struct nouveau_object *engctx;
 	struct nv98_crypt_priv *priv = (void *)subdev;
 	u32 disp = nv_rd32(priv, 0x08701c);
 	u32 stat = nv_rd32(priv, 0x087008) & disp & ~(disp >> 16);
@@ -111,12 +115,16 @@ nv98_crypt_intr(struct nouveau_subdev *subdev)
 	u32 mthd = (addr & 0x07ff) << 2;
 	u32 subc = (addr & 0x3800) >> 11;
 	u32 data = nv_rd32(priv, 0x087044);
+	int chid;
+
+	engctx = nouveau_engctx_get(engine, inst);
+	chid   = pfifo->chid(pfifo, engctx);
 
 	if (stat & 0x00000040) {
 		nv_error(priv, "DISPATCH_ERROR [");
 		nouveau_enum_print(nv98_crypt_isr_error_name, ssta);
-		printk("] ch 0x%08x subc %d mthd 0x%04x data 0x%08x\n",
-		       inst, subc, mthd, data);
+		printk("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n",
+		       chid, (u64)inst << 12, subc, mthd, data);
 		nv_wr32(priv, 0x087004, 0x00000040);
 		stat &= ~0x00000040;
 	}
@@ -127,6 +135,7 @@ nv98_crypt_intr(struct nouveau_subdev *subdev)
 	}
 
 	nv50_fb_trap(nouveau_fb(priv), 1);
+	nouveau_engctx_put(engctx);
 }
 
 static int

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv20.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv20.c
@@ -195,9 +195,10 @@ nv20_graph_tile_prog(struct nouveau_engine *engine, int i)
 void
 nv20_graph_intr(struct nouveau_subdev *subdev)
 {
-	struct nv20_graph_priv *priv = (void *)subdev;
 	struct nouveau_engine *engine = nv_engine(subdev);
-	struct nouveau_handle *handle = NULL;
+	struct nouveau_object *engctx;
+	struct nouveau_handle *handle;
+	struct nv20_graph_priv *priv = (void *)subdev;
 	u32 stat = nv_rd32(priv, NV03_PGRAPH_INTR);
 	u32 nsource = nv_rd32(priv, NV03_PGRAPH_NSOURCE);
 	u32 nstatus = nv_rd32(priv, NV03_PGRAPH_NSTATUS);
@@ -207,15 +208,15 @@ nv20_graph_intr(struct nouveau_subdev *subdev)
 	u32 mthd = (addr & 0x00001ffc);
 	u32 data = nv_rd32(priv, NV04_PGRAPH_TRAPPED_DATA);
 	u32 class = nv_rd32(priv, 0x400160 + subc * 4) & 0xfff;
-	u32 inst = nv_ro32(priv->ctxtab, (chid * 4)) << 4;
 	u32 show = stat;
 
+	engctx = nouveau_engctx_get(engine, chid);
 	if (stat & NV_PGRAPH_INTR_ERROR) {
 		if (nsource & NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD) {
-			handle = nouveau_engctx_lookup_class(engine, inst, class);
+			handle = nouveau_handle_get_class(engctx, class);
 			if (handle && !nv_call(handle->object, mthd, data))
 				show &= ~NV_PGRAPH_INTR_ERROR;
-			nouveau_engctx_handle_put(handle);
+			nouveau_handle_put(handle);
 		}
 	}
 
@@ -233,6 +234,8 @@ nv20_graph_intr(struct nouveau_subdev *subdev)
 		nv_info(priv, "ch %d/%d class 0x%04x mthd 0x%04x data 0x%08x\n",
 			chid, subc, class, mthd, data);
 	}
+
+	nouveau_engctx_put(engctx);
 }
 
 static int

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c
@@ -256,26 +256,32 @@ nv40_graph_tile_prog(struct nouveau_engine *engine, int i)
 static void
 nv40_graph_intr(struct nouveau_subdev *subdev)
 {
-	struct nv40_graph_priv *priv = (void *)subdev;
+	struct nouveau_fifo *pfifo = nouveau_fifo(subdev);
 	struct nouveau_engine *engine = nv_engine(subdev);
+	struct nouveau_object *engctx;
 	struct nouveau_handle *handle = NULL;
+	struct nv40_graph_priv *priv = (void *)subdev;
 	u32 stat = nv_rd32(priv, NV03_PGRAPH_INTR);
 	u32 nsource = nv_rd32(priv, NV03_PGRAPH_NSOURCE);
 	u32 nstatus = nv_rd32(priv, NV03_PGRAPH_NSTATUS);
-	u32 inst = (nv_rd32(priv, 0x40032c) & 0x000fffff) << 4;
+	u32 inst = nv_rd32(priv, 0x40032c) & 0x000fffff;
 	u32 addr = nv_rd32(priv, NV04_PGRAPH_TRAPPED_ADDR);
 	u32 subc = (addr & 0x00070000) >> 16;
 	u32 mthd = (addr & 0x00001ffc);
 	u32 data = nv_rd32(priv, NV04_PGRAPH_TRAPPED_DATA);
 	u32 class = nv_rd32(priv, 0x400160 + subc * 4) & 0xffff;
 	u32 show = stat;
+	int chid;
+
+	engctx = nouveau_engctx_get(engine, inst);
+	chid   = pfifo->chid(pfifo, engctx);
 
 	if (stat & NV_PGRAPH_INTR_ERROR) {
 		if (nsource & NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD) {
-			handle = nouveau_engctx_lookup_class(engine, inst, class);
+			handle = nouveau_handle_get_class(engctx, class);
 			if (handle && !nv_call(handle->object, mthd, data))
 				show &= ~NV_PGRAPH_INTR_ERROR;
-			nouveau_engctx_handle_put(handle);
+			nouveau_handle_put(handle);
 		}
 
 		if (nsource & NV03_PGRAPH_NSOURCE_DMA_VTX_PROTECTION) {
@@ -294,10 +300,12 @@ nv40_graph_intr(struct nouveau_subdev *subdev)
 		printk(" nstatus:");
 		nouveau_bitfield_print(nv10_graph_nstatus, nstatus);
 		printk("\n");
-		nv_error(priv, "ch 0x%08x subc %d class 0x%04x "
+		nv_error(priv, "ch %d [0x%08x] subc %d class 0x%04x "
 			       "mthd 0x%04x data 0x%08x\n",
-			 inst, subc, class, mthd, data);
+			 chid, inst << 4, subc, class, mthd, data);
 	}
+
+	nouveau_engctx_put(engctx);
 }
 
 static int