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yaml
---
r: 88253
b: refs/heads/master
c: 1b69d74
h: refs/heads/master
i:
  88251: a11c6c6
v: v3
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Ilpo Järvinen authored and David S. Miller committed Apr 8, 2008
1 parent 6b7354e commit 72acfa3
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Showing 229 changed files with 5,583 additions and 7,437 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 3f0635016246e2fee6e80b4741299833c68b065e
refs/heads/master: 1b69d745397eac12b3f8a2eb6b799cd476aef282
4 changes: 0 additions & 4 deletions trunk/Documentation/kernel-parameters.txt
Original file line number Diff line number Diff line change
Expand Up @@ -375,10 +375,6 @@ and is between 256 and 4096 characters. It is defined in the file
ccw_timeout_log [S390]
See Documentation/s390/CommonIO for details.

cgroup_disable= [KNL] Disable a particular controller
Format: {name of the controller(s) to disable}
{Currently supported controllers - "memory"}

checkreqprot [SELINUX] Set initial checkreqprot flag value.
Format: { "0" | "1" }
See security/selinux/Kconfig help text.
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15 changes: 1 addition & 14 deletions trunk/Documentation/spi/spi-summary
Original file line number Diff line number Diff line change
Expand Up @@ -116,13 +116,6 @@ low order bit. So when a chip's timing diagram shows the clock
starting low (CPOL=0) and data stabilized for sampling during the
trailing clock edge (CPHA=1), that's SPI mode 1.

Note that the clock mode is relevant as soon as the chipselect goes
active. So the master must set the clock to inactive before selecting
a slave, and the slave can tell the chosen polarity by sampling the
clock level when its select line goes active. That's why many devices
support for example both modes 0 and 3: they don't care about polarity,
and alway clock data in/out on rising clock edges.


How do these driver programming interfaces work?
------------------------------------------------
Expand Down Expand Up @@ -386,14 +379,8 @@ any more such messages.
+ when bidirectional reads and writes start ... by how its
sequence of spi_transfer requests is arranged;

+ which I/O buffers are used ... each spi_transfer wraps a
buffer for each transfer direction, supporting full duplex
(two pointers, maybe the same one in both cases) and half
duplex (one pointer is NULL) transfers;

+ optionally defining short delays after transfers ... using
the spi_transfer.delay_usecs setting (this delay can be the
only protocol effect, if the buffer length is zero);
the spi_transfer.delay_usecs setting;

+ whether the chipselect becomes inactive after a transfer and
any delay ... by using the spi_transfer.cs_change flag;
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8 changes: 1 addition & 7 deletions trunk/arch/frv/kernel/entry-table.S
Original file line number Diff line number Diff line change
Expand Up @@ -316,14 +316,8 @@ __trap_fixup_kernel_data_tlb_miss:
.section .trap.vector
.org TBR_TT_TRAP0 >> 2
.long system_call
.rept 119
.rept 126
.long __entry_unsupported_trap
.endr

# userspace atomic op emulation, traps 120-126
.rept 7
.long __entry_atomic_op
.endr

.org TBR_TT_BREAK >> 2
.long __entry_debug_exception
20 changes: 0 additions & 20 deletions trunk/arch/frv/kernel/entry.S
Original file line number Diff line number Diff line change
Expand Up @@ -654,26 +654,6 @@ __entry_debug_exception:
movgs gr4,psr
jmpl @(gr5,gr0) ; call ill_insn(esfr1,epcr0,esr0)

###############################################################################
#
# handle atomic operation emulation for userspace
#
###############################################################################
.globl __entry_atomic_op
__entry_atomic_op:
LEDS 0x6012
sethi.p %hi(atomic_operation),gr5
setlo %lo(atomic_operation),gr5
movsg esfr1,gr8
movsg epcr0,gr9
movsg esr0,gr10

# now that we've accessed the exception regs, we can enable exceptions
movsg psr,gr4
ori gr4,#PSR_ET,gr4
movgs gr4,psr
jmpl @(gr5,gr0) ; call atomic_operation(esfr1,epcr0,esr0)

###############################################################################
#
# handle media exception
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2 changes: 1 addition & 1 deletion trunk/arch/frv/kernel/head.inc
Original file line number Diff line number Diff line change
Expand Up @@ -46,5 +46,5 @@
#ifdef CONFIG_MMU
__sdram_base = 0x00000000 /* base address to which SDRAM relocated */
#else
__sdram_base = __page_offset /* base address to which SDRAM relocated */
__sdram_base = 0xc0000000 /* base address to which SDRAM relocated */
#endif
7 changes: 7 additions & 0 deletions trunk/arch/frv/kernel/switch_to.S
Original file line number Diff line number Diff line change
Expand Up @@ -102,6 +102,13 @@ __switch_to:
movgs gr14,lr
bar

srli gr15,#28,gr5
subicc gr5,#0xc,gr0,icc0
beq icc0,#0,111f
break
nop
111:

# jump to __switch_back or ret_from_fork as appropriate
# - move prev to GR8
movgs gr4,psr
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227 changes: 0 additions & 227 deletions trunk/arch/frv/kernel/traps.c
Original file line number Diff line number Diff line change
Expand Up @@ -100,233 +100,6 @@ asmlinkage void illegal_instruction(unsigned long esfr1, unsigned long epcr0, un
force_sig_info(info.si_signo, &info, current);
} /* end illegal_instruction() */

/*****************************************************************************/
/*
* handle atomic operations with errors
* - arguments in gr8, gr9, gr10
* - original memory value placed in gr5
* - replacement memory value placed in gr9
*/
asmlinkage void atomic_operation(unsigned long esfr1, unsigned long epcr0,
unsigned long esr0)
{
static DEFINE_SPINLOCK(atomic_op_lock);
unsigned long x, y, z, *p;
mm_segment_t oldfs;
siginfo_t info;
int ret;

y = 0;
z = 0;

oldfs = get_fs();
if (!user_mode(__frame))
set_fs(KERNEL_DS);

switch (__frame->tbr & TBR_TT) {
/* TIRA gr0,#120
* u32 __atomic_user_cmpxchg32(u32 *ptr, u32 test, u32 new)
*/
case TBR_TT_ATOMIC_CMPXCHG32:
p = (unsigned long *) __frame->gr8;
x = __frame->gr9;
y = __frame->gr10;

for (;;) {
ret = get_user(z, p);
if (ret < 0)
goto error;

if (z != x)
goto done;

spin_lock_irq(&atomic_op_lock);

if (__get_user(z, p) == 0) {
if (z != x)
goto done2;

if (__put_user(y, p) == 0)
goto done2;
goto error2;
}

spin_unlock_irq(&atomic_op_lock);
}

/* TIRA gr0,#121
* u32 __atomic_kernel_xchg32(void *v, u32 new)
*/
case TBR_TT_ATOMIC_XCHG32:
p = (unsigned long *) __frame->gr8;
y = __frame->gr9;

for (;;) {
ret = get_user(z, p);
if (ret < 0)
goto error;

spin_lock_irq(&atomic_op_lock);

if (__get_user(z, p) == 0) {
if (__put_user(y, p) == 0)
goto done2;
goto error2;
}

spin_unlock_irq(&atomic_op_lock);
}

/* TIRA gr0,#122
* ulong __atomic_kernel_XOR_return(ulong i, ulong *v)
*/
case TBR_TT_ATOMIC_XOR:
p = (unsigned long *) __frame->gr8;
x = __frame->gr9;

for (;;) {
ret = get_user(z, p);
if (ret < 0)
goto error;

spin_lock_irq(&atomic_op_lock);

if (__get_user(z, p) == 0) {
y = x ^ z;
if (__put_user(y, p) == 0)
goto done2;
goto error2;
}

spin_unlock_irq(&atomic_op_lock);
}

/* TIRA gr0,#123
* ulong __atomic_kernel_OR_return(ulong i, ulong *v)
*/
case TBR_TT_ATOMIC_OR:
p = (unsigned long *) __frame->gr8;
x = __frame->gr9;

for (;;) {
ret = get_user(z, p);
if (ret < 0)
goto error;

spin_lock_irq(&atomic_op_lock);

if (__get_user(z, p) == 0) {
y = x ^ z;
if (__put_user(y, p) == 0)
goto done2;
goto error2;
}

spin_unlock_irq(&atomic_op_lock);
}

/* TIRA gr0,#124
* ulong __atomic_kernel_AND_return(ulong i, ulong *v)
*/
case TBR_TT_ATOMIC_AND:
p = (unsigned long *) __frame->gr8;
x = __frame->gr9;

for (;;) {
ret = get_user(z, p);
if (ret < 0)
goto error;

spin_lock_irq(&atomic_op_lock);

if (__get_user(z, p) == 0) {
y = x & z;
if (__put_user(y, p) == 0)
goto done2;
goto error2;
}

spin_unlock_irq(&atomic_op_lock);
}

/* TIRA gr0,#125
* int __atomic_user_sub_return(atomic_t *v, int i)
*/
case TBR_TT_ATOMIC_SUB:
p = (unsigned long *) __frame->gr8;
x = __frame->gr9;

for (;;) {
ret = get_user(z, p);
if (ret < 0)
goto error;

spin_lock_irq(&atomic_op_lock);

if (__get_user(z, p) == 0) {
y = z - x;
if (__put_user(y, p) == 0)
goto done2;
goto error2;
}

spin_unlock_irq(&atomic_op_lock);
}

/* TIRA gr0,#126
* int __atomic_user_add_return(atomic_t *v, int i)
*/
case TBR_TT_ATOMIC_ADD:
p = (unsigned long *) __frame->gr8;
x = __frame->gr9;

for (;;) {
ret = get_user(z, p);
if (ret < 0)
goto error;

spin_lock_irq(&atomic_op_lock);

if (__get_user(z, p) == 0) {
y = z + x;
if (__put_user(y, p) == 0)
goto done2;
goto error2;
}

spin_unlock_irq(&atomic_op_lock);
}

default:
BUG();
}

done2:
spin_unlock_irq(&atomic_op_lock);
done:
if (!user_mode(__frame))
set_fs(oldfs);
__frame->gr5 = z;
__frame->gr9 = y;
return;

error2:
spin_unlock_irq(&atomic_op_lock);
error:
if (!user_mode(__frame))
set_fs(oldfs);
__frame->pc -= 4;

die_if_kernel("-- Atomic Op Error --\n");

info.si_signo = SIGSEGV;
info.si_code = SEGV_ACCERR;
info.si_errno = 0;
info.si_addr = (void *) __frame->pc;

force_sig_info(info.si_signo, &info, current);
}

/*****************************************************************************/
/*
*
Expand Down
2 changes: 0 additions & 2 deletions trunk/arch/m68k/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -13,8 +13,6 @@
# Copyright (C) 1994 by Hamish Macdonald
#

KBUILD_DEFCONFIG := amiga_defconfig

# override top level makefile
AS += -m68020
LDFLAGS := -m m68kelf
Expand Down
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