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yaml
---
r: 58235
b: refs/heads/master
c: fde9782
h: refs/heads/master
i:
  58233: 881a109
  58231: eda5ae2
v: v3
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Ralf Baechle committed Jul 6, 2007
1 parent fc6247c commit 7356e83
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2 changes: 1 addition & 1 deletion [refs]
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---
refs/heads/master: 075c733e19ce7530b53b78151cc4d303c8f64548
refs/heads/master: fde97822a295da9dffa4af643b49a58ffc4516ad
11 changes: 11 additions & 0 deletions trunk/include/asm-mips/cpu.h
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Expand Up @@ -124,6 +124,17 @@
#define PRID_REV_VR4181A 0x0070 /* Same as VR4122 */
#define PRID_REV_VR4130 0x0080

/*
* Older processors used to encode processor version and revision in two
* 4-bit bitfields, the 4K seems to simply count up and even newer MTI cores
* have switched to use the 8-bits as 3:3:2 bitfield with the last field as
* the patch number. *ARGH*
*/
#define PRID_REV_ENCODE_44(ver, rev) \
((ver) << 4 | (rev))
#define PRID_REV_ENCODE_332(ver, rev, patch) \
((ver) << 5 | (rev) << 2 | (patch))

/*
* FPU implementation/revision register (CP1 control register 0).
*
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