---

yaml
---
r: 334191
b: refs/heads/master
c: 8eea8a6
h: refs/heads/master
i:
  334189: 9b65ca7
  334187: 3b4de37
  334183: 50299f5
  334175: 383ba15
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: f248ef1cd39dc9900cca5bf0a51b1e80081ecc67
+refs/heads/master: 8eea8a6a9a2af067bd3006f7fefab66a4fb66451

trunk/arch/openrisc/kernel/irq.c

@@ -58,7 +58,7 @@ static void or1k_pic_ack(struct irq_data *data)
 {
 	/* EDGE-triggered interrupts need to be ack'ed in order to clear
 	 * the latch.
-	 * LEVER-triggered interrupts do not need to be ack'ed; however,
+	 * LEVEL-triggered interrupts do not need to be ack'ed; however,
 	 * ack'ing the interrupt has no ill-effect and is quicker than
 	 * trying to figure out what type it is...
 	 */
@@ -77,7 +77,7 @@ static void or1k_pic_ack(struct irq_data *data)
 
 	mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq));
 #else
-	WARN(1, "Interrupt handling possibily broken\n");
+	WARN(1, "Interrupt handling possibly broken\n");
 	mtspr(SPR_PICSR, (1UL << data->hwirq));
 #endif
 }
@@ -89,7 +89,7 @@ static void or1k_pic_mask_ack(struct irq_data *data)
 #ifdef CONFIG_OR1K_1200
 	mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq));
 #else
-	WARN(1, "Interrupt handling possibily broken\n");
+	WARN(1, "Interrupt handling possibly broken\n");
 	mtspr(SPR_PICSR, (1UL << data->hwirq));
 #endif
 }