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[PATCH] bcm43xx: fix some stuff, add a few missing mmiowb(), remove d…
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…ead code.

This may workaround the XMIT ERRORs some people are getting.

Signed-off-by: Michael Buesch <mbuesch@freenet.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Michael Buesch authored and John W. Linville committed Mar 27, 2006
1 parent 7ce942d commit 7373384
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Showing 6 changed files with 167 additions and 187 deletions.
23 changes: 3 additions & 20 deletions drivers/net/wireless/bcm43xx/bcm43xx_dma.h
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Original file line number Diff line number Diff line change
Expand Up @@ -9,27 +9,10 @@


/* DMA-Interrupt reasons. */
/*TODO: add the missing ones. */
#define BCM43xx_DMAIRQ_ERR0 (1 << 10)
#define BCM43xx_DMAIRQ_ERR1 (1 << 11)
#define BCM43xx_DMAIRQ_ERR2 (1 << 12)
#define BCM43xx_DMAIRQ_ERR3 (1 << 13)
#define BCM43xx_DMAIRQ_ERR4 (1 << 14)
#define BCM43xx_DMAIRQ_ERR5 (1 << 15)
#define BCM43xx_DMAIRQ_FATALMASK ((1 << 10) | (1 << 11) | (1 << 12) \
| (1 << 14) | (1 << 15))
#define BCM43xx_DMAIRQ_NONFATALMASK (1 << 13)
#define BCM43xx_DMAIRQ_RX_DONE (1 << 16)
/* helpers */
#define BCM43xx_DMAIRQ_ANYERR (BCM43xx_DMAIRQ_ERR0 | \
BCM43xx_DMAIRQ_ERR1 | \
BCM43xx_DMAIRQ_ERR2 | \
BCM43xx_DMAIRQ_ERR3 | \
BCM43xx_DMAIRQ_ERR4 | \
BCM43xx_DMAIRQ_ERR5)
#define BCM43xx_DMAIRQ_FATALERR (BCM43xx_DMAIRQ_ERR0 | \
BCM43xx_DMAIRQ_ERR1 | \
BCM43xx_DMAIRQ_ERR2 | \
BCM43xx_DMAIRQ_ERR4 | \
BCM43xx_DMAIRQ_ERR5)
#define BCM43xx_DMAIRQ_NONFATALERR BCM43xx_DMAIRQ_ERR3

/* DMA controller register offsets. (relative to BCM43xx_DMA#_BASE) */
#define BCM43xx_DMA_TX_CONTROL 0x00
Expand Down
42 changes: 6 additions & 36 deletions drivers/net/wireless/bcm43xx/bcm43xx_ilt.c
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Original file line number Diff line number Diff line change
Expand Up @@ -312,56 +312,26 @@ const u16 bcm43xx_ilt_sigmasqr2[BCM43xx_ILT_SIGMASQR_SIZE] = {

/**** Helper functions to access the device Internal Lookup Tables ****/

void bcm43xx_ilt_write16(struct bcm43xx_private *bcm, u16 offset, u16 val)
void bcm43xx_ilt_write(struct bcm43xx_private *bcm, u16 offset, u16 val)
{
if ( bcm->current_core->phy->type == BCM43xx_PHYTYPE_A ) {
if (bcm->current_core->phy->type == BCM43xx_PHYTYPE_A) {
bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, offset);
mmiowb();
bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, val);
} else {
bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_CTRL, offset);
mmiowb();
bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_DATA1, val);
}
}

u16 bcm43xx_ilt_read16(struct bcm43xx_private *bcm, u16 offset)
u16 bcm43xx_ilt_read(struct bcm43xx_private *bcm, u16 offset)
{
if ( bcm->current_core->phy->type == BCM43xx_PHYTYPE_A ) {
if (bcm->current_core->phy->type == BCM43xx_PHYTYPE_A) {
bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, offset);
return bcm43xx_phy_read(bcm, BCM43xx_PHY_ILT_A_DATA1);
} else {
bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_CTRL, offset);
return bcm43xx_phy_read(bcm, BCM43xx_PHY_ILT_G_DATA1);
}
}

void bcm43xx_ilt_write32(struct bcm43xx_private *bcm, u16 offset, u32 val)
{
if ( bcm->current_core->phy->type == BCM43xx_PHYTYPE_A ) {
bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, offset);
bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA2, (u16)(val >> 16));
bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, (u16)(val & 0x0000FFFF));
} else {
bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_CTRL, offset);
bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_DATA2, (u16)(val >> 16));
bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_DATA1, (u16)(val & 0x0000FFFF));
}
}

u32 bcm43xx_ilt_read32(struct bcm43xx_private *bcm, u16 offset)
{
u32 ret;

if ( bcm->current_core->phy->type == BCM43xx_PHYTYPE_A ) {
bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, offset);
ret = bcm43xx_phy_read(bcm, BCM43xx_PHY_ILT_A_DATA2);
ret <<= 16;
ret |= bcm43xx_phy_read(bcm, BCM43xx_PHY_ILT_A_DATA1);
} else {
bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_CTRL, offset);
ret = bcm43xx_phy_read(bcm, BCM43xx_PHY_ILT_G_DATA2);
ret <<= 16;
ret |= bcm43xx_phy_read(bcm, BCM43xx_PHY_ILT_G_DATA1);
}

return ret;
}
6 changes: 2 additions & 4 deletions drivers/net/wireless/bcm43xx/bcm43xx_ilt.h
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Original file line number Diff line number Diff line change
Expand Up @@ -26,9 +26,7 @@ extern const u16 bcm43xx_ilt_sigmasqr1[BCM43xx_ILT_SIGMASQR_SIZE];
extern const u16 bcm43xx_ilt_sigmasqr2[BCM43xx_ILT_SIGMASQR_SIZE];


void bcm43xx_ilt_write16(struct bcm43xx_private *bcm, u16 offset, u16 val);
u16 bcm43xx_ilt_read16(struct bcm43xx_private *bcm, u16 offset);
void bcm43xx_ilt_write32(struct bcm43xx_private *bcm, u16 offset, u32 val);
u32 bcm43xx_ilt_read32(struct bcm43xx_private *bcm, u16 offset);
void bcm43xx_ilt_write(struct bcm43xx_private *bcm, u16 offset, u16 val);
u16 bcm43xx_ilt_read(struct bcm43xx_private *bcm, u16 offset);

#endif /* BCM43xx_ILT_H_ */
76 changes: 52 additions & 24 deletions drivers/net/wireless/bcm43xx/bcm43xx_main.c
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Original file line number Diff line number Diff line change
Expand Up @@ -155,6 +155,7 @@ static void bcm43xx_ram_write(struct bcm43xx_private *bcm, u16 offset, u32 val)
val = swab32(val);

bcm43xx_write32(bcm, BCM43xx_MMIO_RAM_CONTROL, offset);
mmiowb();
bcm43xx_write32(bcm, BCM43xx_MMIO_RAM_DATA, val);
}

Expand Down Expand Up @@ -225,16 +226,20 @@ void bcm43xx_shm_write32(struct bcm43xx_private *bcm,
if (offset & 0x0003) {
/* Unaligned access */
bcm43xx_shm_control_word(bcm, routing, offset >> 2);
mmiowb();
bcm43xx_write16(bcm, BCM43xx_MMIO_SHM_DATA_UNALIGNED,
(value >> 16) & 0xffff);
mmiowb();
bcm43xx_shm_control_word(bcm, routing, (offset >> 2) + 1);
mmiowb();
bcm43xx_write16(bcm, BCM43xx_MMIO_SHM_DATA,
value & 0xffff);
return;
}
offset >>= 2;
}
bcm43xx_shm_control_word(bcm, routing, offset);
mmiowb();
bcm43xx_write32(bcm, BCM43xx_MMIO_SHM_DATA, value);
}

Expand All @@ -246,13 +251,15 @@ void bcm43xx_shm_write16(struct bcm43xx_private *bcm,
if (offset & 0x0003) {
/* Unaligned access */
bcm43xx_shm_control_word(bcm, routing, offset >> 2);
mmiowb();
bcm43xx_write16(bcm, BCM43xx_MMIO_SHM_DATA_UNALIGNED,
value);
return;
}
offset >>= 2;
}
bcm43xx_shm_control_word(bcm, routing, offset);
mmiowb();
bcm43xx_write16(bcm, BCM43xx_MMIO_SHM_DATA, value);
}

Expand Down Expand Up @@ -311,6 +318,7 @@ void bcm43xx_tsf_write(struct bcm43xx_private *bcm, u64 tsf)
status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
status |= BCM43xx_SBF_TIME_UPDATE;
bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);
mmiowb();

/* Be careful with the in-progress timer.
* First zero out the low register, so we have a full
Expand All @@ -320,21 +328,25 @@ void bcm43xx_tsf_write(struct bcm43xx_private *bcm, u64 tsf)
u32 lo = (tsf & 0x00000000FFFFFFFFULL);
u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;

barrier();
bcm43xx_write32(bcm, BCM43xx_MMIO_REV3PLUS_TSF_LOW, 0);
mmiowb();
bcm43xx_write32(bcm, BCM43xx_MMIO_REV3PLUS_TSF_HIGH, hi);
mmiowb();
bcm43xx_write32(bcm, BCM43xx_MMIO_REV3PLUS_TSF_LOW, lo);
} else {
u16 v0 = (tsf & 0x000000000000FFFFULL);
u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;

barrier();
bcm43xx_write16(bcm, BCM43xx_MMIO_TSF_0, 0);
mmiowb();
bcm43xx_write16(bcm, BCM43xx_MMIO_TSF_3, v3);
mmiowb();
bcm43xx_write16(bcm, BCM43xx_MMIO_TSF_2, v2);
mmiowb();
bcm43xx_write16(bcm, BCM43xx_MMIO_TSF_1, v1);
mmiowb();
bcm43xx_write16(bcm, BCM43xx_MMIO_TSF_0, v0);
}

Expand Down Expand Up @@ -974,6 +986,7 @@ static void bcm43xx_geo_init(struct bcm43xx_private *bcm)
void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm)
{
struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
struct bcm43xx_radioinfo *radio = bcm->current_core->radio;
unsigned int i, max_loop;
u16 value = 0;
u32 buffer[5] = {
Expand All @@ -984,6 +997,13 @@ void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm)
0x00000000,
};

/* FIXME: It seems like a dummy_transmission corrupts the DMA engines,
* once they are initialized. So avoid doing a dummy_transmission,
* if the DMA engines are running.
*/
if (bcm->initialized)
return;

switch (phy->type) {
case BCM43xx_PHYTYPE_A:
max_loop = 0x1E;
Expand Down Expand Up @@ -1015,24 +1035,28 @@ void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm)
bcm43xx_write16(bcm, 0x0500, 0x0000);
bcm43xx_write16(bcm, 0x0502, 0x0030);

if (radio->version == 0x2050 && radio->revision <= 0x5)
bcm43xx_radio_write16(bcm, 0x0051, 0x0017);
for (i = 0x00; i < max_loop; i++) {
value = bcm43xx_read16(bcm, 0x050E);
if ((value & 0x0080) != 0)
if (value & 0x0080)
break;
udelay(10);
}
for (i = 0x00; i < 0x0A; i++) {
value = bcm43xx_read16(bcm, 0x050E);
if ((value & 0x0400) != 0)
if (value & 0x0400)
break;
udelay(10);
}
for (i = 0x00; i < 0x0A; i++) {
value = bcm43xx_read16(bcm, 0x0690);
if ((value & 0x0100) == 0)
if (!(value & 0x0100))
break;
udelay(10);
}
if (radio->version == 0x2050 && radio->revision <= 0x5)
bcm43xx_radio_write16(bcm, 0x0051, 0x0037);
}

static void key_write(struct bcm43xx_private *bcm,
Expand Down Expand Up @@ -1646,22 +1670,6 @@ static void handle_irq_beacon(struct bcm43xx_private *bcm)
}
}

/* Debug helper for irq bottom-half to print all reason registers. */
#define bcmirq_print_reasons(description) \
do { \
dprintkl(KERN_ERR PFX description "\n" \
KERN_ERR PFX " Generic Reason: 0x%08x\n" \
KERN_ERR PFX " DMA reasons: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n" \
KERN_ERR PFX " DMA TX status: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n", \
reason, \
dma_reason[0], dma_reason[1], \
dma_reason[2], dma_reason[3], \
bcm43xx_read32(bcm, BCM43xx_MMIO_DMA1_BASE + BCM43xx_DMA_TX_STATUS), \
bcm43xx_read32(bcm, BCM43xx_MMIO_DMA2_BASE + BCM43xx_DMA_TX_STATUS), \
bcm43xx_read32(bcm, BCM43xx_MMIO_DMA3_BASE + BCM43xx_DMA_TX_STATUS), \
bcm43xx_read32(bcm, BCM43xx_MMIO_DMA4_BASE + BCM43xx_DMA_TX_STATUS)); \
} while (0)

/* Interrupt handler bottom-half */
static void bcm43xx_interrupt_tasklet(struct bcm43xx_private *bcm)
{
Expand Down Expand Up @@ -1690,9 +1698,30 @@ static void bcm43xx_interrupt_tasklet(struct bcm43xx_private *bcm)
* on DMA or PIO queues.
* Maybe we get this in other error conditions, too.
*/
bcmirq_print_reasons("XMIT ERROR");
printkl(KERN_ERR PFX "FATAL ERROR: BCM43xx_IRQ_XMIT_ERROR\n");
bcmirq_handled(BCM43xx_IRQ_XMIT_ERROR);
}
if (unlikely((dma_reason[0] & BCM43xx_DMAIRQ_FATALMASK) |
(dma_reason[1] & BCM43xx_DMAIRQ_FATALMASK) |
(dma_reason[2] & BCM43xx_DMAIRQ_FATALMASK) |
(dma_reason[3] & BCM43xx_DMAIRQ_FATALMASK))) {
printkl(KERN_ERR PFX "FATAL ERROR: Fatal DMA error: "
"0x%08X, 0x%08X, 0x%08X, 0x%08X\n",
dma_reason[0], dma_reason[1],
dma_reason[2], dma_reason[3]);
bcm43xx_controller_restart(bcm, "DMA error");
bcm43xx_unlock_mmio(bcm, flags);
return;
}
if (unlikely((dma_reason[0] & BCM43xx_DMAIRQ_NONFATALMASK) |
(dma_reason[1] & BCM43xx_DMAIRQ_NONFATALMASK) |
(dma_reason[2] & BCM43xx_DMAIRQ_NONFATALMASK) |
(dma_reason[3] & BCM43xx_DMAIRQ_NONFATALMASK))) {
printkl(KERN_ERR PFX "DMA error: "
"0x%08X, 0x%08X, 0x%08X, 0x%08X\n",
dma_reason[0], dma_reason[1],
dma_reason[2], dma_reason[3]);
}

if (reason & BCM43xx_IRQ_PS) {
handle_irq_ps(bcm);
Expand Down Expand Up @@ -1780,8 +1809,6 @@ static void bcm43xx_interrupt_tasklet(struct bcm43xx_private *bcm)
bcm43xx_unlock_mmio(bcm, flags);
}

#undef bcmirq_print_reasons

static void bcm43xx_interrupt_ack(struct bcm43xx_private *bcm,
u32 reason, u32 mask)
{
Expand Down Expand Up @@ -3875,6 +3902,7 @@ static void bcm43xx_chip_reset(void *_bcm)
void bcm43xx_controller_restart(struct bcm43xx_private *bcm, const char *reason)
{
bcm43xx_interrupt_disable(bcm, BCM43xx_IRQ_ALL);
bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); /* dummy read */
printk(KERN_ERR PFX "Controller RESET (%s) ...\n", reason);
INIT_WORK(&bcm->restart_work, bcm43xx_chip_reset, bcm);
schedule_work(&bcm->restart_work);
Expand Down
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